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Merge pull request #3001 from knn-k/aarch64instr11
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AArch64: Add ARM64Instruction.cpp to aarch64.mk for jitbuilder
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@0xdaryl
0xdaryl authored Sep 28, 2018
2 parents c9721db + ab21401 commit 32df956
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Showing 2 changed files with 84 additions and 107 deletions.
190 changes: 83 additions & 107 deletions compiler/aarch64/codegen/ARM64Instruction.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -837,30 +837,30 @@ class ARM64Trg1Instruction : public TR::Instruction
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
bool refsRegister(TR::Register *reg);
virtual bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
bool usesRegister(TR::Register *reg);
virtual bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
bool defsRegister(TR::Register *reg);
virtual bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
bool defsRealRegister(TR::Register *reg);
virtual bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
void assignRegisters(TR_RegisterKinds kindToBeAssigned);
virtual void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
Expand Down Expand Up @@ -933,36 +933,6 @@ class ARM64Trg1ImmInstruction : public ARM64Trg1Instruction
TR_ASSERT(false, "Not implemented yet.");
}

/**
* @brief Answers whether this instruction references the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
* @return instruction cursor
Expand Down Expand Up @@ -1077,6 +1047,36 @@ class ARM64Trg1Src1Instruction : public ARM64Trg1Instruction
source1->setRegisterFieldRN(instruction);
}

/**
* @brief Answers whether this instruction references the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
virtual bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
virtual bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
virtual bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
virtual bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
virtual void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
* @return instruction cursor
Expand Down Expand Up @@ -1184,36 +1184,6 @@ class ARM64Trg1Src1ImmInstruction : public ARM64Trg1Src1Instruction
*instruction |= ((_source1Immediate & 0xfff) << 10); /* imm12 */
}

/**
* @brief Answers whether this instruction references the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
* @return instruction cursor
Expand Down Expand Up @@ -1302,6 +1272,36 @@ class ARM64Trg1Src2Instruction : public ARM64Trg1Src1Instruction
source2->setRegisterFieldRM(instruction);
}

/**
* @brief Answers whether this instruction references the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
virtual bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
virtual bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
virtual bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
virtual bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
virtual void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
* @return instruction cursor
Expand Down Expand Up @@ -1502,36 +1502,6 @@ class ARM64Trg1Src2ExtendedInstruction : public ARM64Trg1Src2Instruction
*instruction |= ((_extendType & 0x7) << 13) | ((_shiftAmount & 0x7) << 10);
}

/**
* @brief Answers whether this instruction references the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
* @return instruction cursor
Expand Down Expand Up @@ -1714,30 +1684,30 @@ class ARM64Trg1MemInstruction : public ARM64Trg1Instruction
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
bool refsRegister(TR::Register *reg);
virtual bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
bool usesRegister(TR::Register *reg);
virtual bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
bool defsRegister(TR::Register *reg);
virtual bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
bool defsRealRegister(TR::Register *reg);
virtual bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
void assignRegisters(TR_RegisterKinds kindToBeAssigned);
virtual void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
Expand Down Expand Up @@ -1768,7 +1738,10 @@ class ARM64MemInstruction : public TR::Instruction
*/
ARM64MemInstruction(TR::InstOpCode::Mnemonic op,
TR::Node *node,
TR::MemoryReference *mr, TR::CodeGenerator *cg);
TR::MemoryReference *mr, TR::CodeGenerator *cg)
: TR::Instruction(op, node, cg), _memoryReference(mr)
{
}

/*
* @brief Constructor
Expand All @@ -1781,7 +1754,10 @@ class ARM64MemInstruction : public TR::Instruction
ARM64MemInstruction(TR::InstOpCode::Mnemonic op,
TR::Node *node,
TR::MemoryReference *mr,
TR::Instruction *precedingInstruction, TR::CodeGenerator *cg);
TR::Instruction *precedingInstruction, TR::CodeGenerator *cg)
: TR::Instruction(op, node, precedingInstruction, cg), _memoryReference(mr)
{
}

/**
* @brief Gets instruction kind
Expand Down Expand Up @@ -1907,30 +1883,30 @@ class ARM64MemSrc1Instruction : public ARM64MemInstruction
* @param[in] reg : virtual register
* @return true when the instruction references the virtual register
*/
bool refsRegister(TR::Register *reg);
virtual bool refsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction uses the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction uses the virtual register
*/
bool usesRegister(TR::Register *reg);
virtual bool usesRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given virtual register
* @param[in] reg : virtual register
* @return true when the instruction defines the virtual register
*/
bool defsRegister(TR::Register *reg);
virtual bool defsRegister(TR::Register *reg);
/**
* @brief Answers whether this instruction defines the given real register
* @param[in] reg : real register
* @return true when the instruction defines the real register
*/
bool defsRealRegister(TR::Register *reg);
virtual bool defsRealRegister(TR::Register *reg);
/**
* @brief Assigns registers
* @param[in] kindToBeAssigned : register kind
*/
void assignRegisters(TR_RegisterKinds kindToBeAssigned);
virtual void assignRegisters(TR_RegisterKinds kindToBeAssigned);

/**
* @brief Generates binary encoding of the instruction
Expand Down
1 change: 1 addition & 0 deletions jitbuilder/build/files/target/aarch64.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@
JIT_PRODUCT_BACKEND_SOURCES+= \
$(JIT_OMR_DIRTY_DIR)/aarch64/codegen/ARM64BinaryEncoding.cpp \
$(JIT_OMR_DIRTY_DIR)/aarch64/codegen/ARM64Debug.cpp \
$(JIT_OMR_DIRTY_DIR)/aarch64/codegen/ARM64Instruction.cpp \
$(JIT_OMR_DIRTY_DIR)/aarch64/codegen/ARM64OutOfLineCodeSection.cpp \
$(JIT_OMR_DIRTY_DIR)/aarch64/codegen/ARM64SystemLinkage.cpp \
$(JIT_OMR_DIRTY_DIR)/aarch64/codegen/BinaryEvaluator.cpp \
Expand Down

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