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Merge branch 'main' of github.com:efabless/EF_GPIO8
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M0stafaRady committed Sep 30, 2024
2 parents 04fc1ac + 6b15487 commit 4c4a356
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152 changes: 18 additions & 134 deletions .github/workflows/uvm_ci.yaml
Original file line number Diff line number Diff line change
@@ -1,142 +1,26 @@
name: Run UVM all tests
name: Run UVM tests

on:
push: # This now triggers on pushes to any branch
pull_request: # This now triggers on pull requests to any branch

jobs:
verify_APB:
Extract-Buses:
runs-on: ubuntu-latest
outputs:
IPs: ${{ steps.set-IPs-matrix.outputs.IPs }}
buses: ${{ steps.extract_buses.outputs.buses }}
steps:
- uses: actions/checkout@v2

- name: Set up Python
uses: actions/setup-python@v2
with:
python-version: '3.x'

- name: download docker
run: |
docker pull efabless/dv:cocotb
- name: Navigate to verify/uvm-python and run tests
run: |
cd verify/uvm-python
make run_all_tests RUN_MERGE_COVERAGE=false
- name: Check for test results in run
run: |
cd verify/uvm-python
passed_count=$(find sim/default_tag -type f -name 'passed' | wc -l)
failed_count=$(find sim/default_tag -type f -name 'failed' | wc -l)
unknown_count=$(find sim/default_tag -type f -name 'unknown' | wc -l)
echo "Passed: $passed_count"
echo "Failed: $failed_count"
echo "Unknown: $unknown_count"
if [ "$passed_count" -eq 0 ]; then
echo "Error: No passed test results found"
exit 1
elif [ "$failed_count" -ne 0 ] || [ "$unknown_count" -ne 0 ]; then
echo "Error: There are failed or unknown test results"
exit 1
else
echo "All tests passed successfully"
fi
- name: tar failed tests
if: failure()
run: |
cd verify/uvm-python
tar -czf failed_tests.tar.gz sim/default_tag
- name: upload failed tests
if: failure()
uses: actions/upload-artifact@v2
with:
name: failed_tests
path: verify/uvm-python/failed_tests.tar.gz

verify_AHB:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2

- name: Set up Python
uses: actions/setup-python@v2
with:
python-version: '3.x'

- name: download docker
run: |
docker pull efabless/dv:cocotb
- name: Navigate to verify/uvm-python and run tests
run: |
cd verify/uvm-python
make run_all_tests RUN_MERGE_COVERAGE=false BUS_TYPE=AHB
- name: Check for test results in run
run: |
cd verify/uvm-python
passed_count=$(find sim/default_tag -type f -name 'passed' | wc -l)
failed_count=$(find sim/default_tag -type f -name 'failed' | wc -l)
unknown_count=$(find sim/default_tag -type f -name 'unknown' | wc -l)
echo "Passed: $passed_count"
echo "Failed: $failed_count"
echo "Unknown: $unknown_count"
if [ "$passed_count" -eq 0 ]; then
echo "Error: No passed test results found"
exit 1
elif [ "$failed_count" -ne 0 ] || [ "$unknown_count" -ne 0 ]; then
echo "Error: There are failed or unknown test results"
exit 1
else
echo "All tests passed successfully"
fi
- name: tar failed tests
if: failure()
run: |
cd verify/uvm-python
tar -czf failed_tests.tar.gz sim/default_tag
- name: upload failed tests
if: failure()
uses: actions/upload-artifact@v2
with:
name: failed_tests
path: verify/uvm-python/failed_tests.tar.gz

lint: # Lint the RTL code
runs-on: ubuntu-latest
steps:
- name: Set up Python
uses: actions/setup-python@v2
with:
python-version: '3.x'

- name: download docker
run: |
docker pull efabless/dv:cocotb
- uses: actions/checkout@v2
- name: Lint
run: |
cd verify/uvm-python
make lint BUS_TYPE=APB
cnt=$(grep -c "Error" "sim/linter.log")
if ! [[ $cnt ]]; then cnt=0; fi
if [[ $cnt -eq 1 ]]; then exit 0; fi
exit 2
cnt=$(grep -c "Warning" "sim/linter.log")
if ! [[ $cnt ]]; then cnt=0; fi
if [[ $cnt -eq 1 ]]; then exit 0; fi
exit 2
- name: Upload lint results
if: failure()
uses: actions/upload-artifact@v2
with:
name: lint_results.log
path: verify/uvm-python/sim/linter.log
- name: Extract Supported Buses
id: extract_buses
uses: efabless/EF_UVM/.github/actions/get-bus@main
- name: Check Output
run: echo ${{ steps.extract_buses.outputs.buses }}
Run-IP-Tests:
uses: efabless/EF_UVM/.github/workflows/run_IP.yaml@main
needs: [Extract-Buses]
with:
test-names: "all_tests"
name: ${{ github.event.repository.name }}
buses: ${{ needs.Extract-Buses.outputs.buses }}
is-ip: true
4 changes: 3 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -54,4 +54,6 @@ dkms.conf


*.vcd
*.out
*.out

gl
8 changes: 6 additions & 2 deletions EF_GPIO8.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,8 @@ info:
license: APACHE 2.0
author: Mohamed Shalan
email: [email protected]
version: v1.0.1
date: 15-4-2024
version: v1.0.10
date: 17-09-2024
category: digital
tags:
- peripheral
Expand All @@ -21,15 +21,19 @@ info:
- IP: 72
- APB: 476
- AHBL: 493
- WB: 574
width": "0.0"
height": "0.0"
technology: n/a
clock_freq_mhz:
- IP: 1666
- APB: 1250
- AHBL: 294
- WB: 588
digital_supply_voltage: n/a
analog_supply_voltage: n/a
irq_reg_offset: 0xFF00
fifo_reg_offset: 0xFE00

ports:
- name: bus_in
Expand Down
17 changes: 9 additions & 8 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ A generic 8-bit General Purpose I/O (GPIO) Peripheral with the following feature
## The wrapped IP


APB and AHBL wrappers, generated by the [BusWrap](https://github.com/efabless/BusWrap/tree/main) `bus_wrap.py` utility, are provided. WB wrapper will be provided soon. All wrappers provide the same programmer's interface as outlined in the following sections.
APB, AHBL, and Wishbone wrappers, generated by the [BusWrap](https://github.com/efabless/BusWrap/tree/main) `bus_wrap.py` utility, are provided. All wrappers provide the same programmer's interface as outlined in the following sections.

### Wrapped IP System Integration

Expand All @@ -32,9 +32,10 @@ EF_GPIO8_APB INST (
The following table is the result for implementing the EF_GPIO8 IP with different wrappers using Sky130 PDK and [OpenLane2](https://github.com/efabless/openlane2) flow.
|Module | Number of cells | Max. freq |
|---|---|---|
|EF_GPIO8|72|1666 MHz|
|EF_GPIO8_APB|476|1250 MHz|
|EF_GPIO8_AHBL|493|294 MHz|
|EF_GPIO8|72| 1666 |
|EF_GPIO8_APB|476|1250|
|EF_GPIO8_AHBL|493|294|
|EF_GPIO8_WB|574|588|

## The Programming Interface

Expand All @@ -45,10 +46,10 @@ The following table is the result for implementing the EF_GPIO8 IP with differen
|DATAI|0000|0x00000000|r|Data In Register; Reading from this register returns the pins status (8 pins); one bit per pin|
|DATAO|0004|0x00000000|w|Data Out Register; Writing to this register change the status of the port pins (8 pins); one bit per pin|
|DIR|0008|0x00000000|w|Direction Register; One bit per pin 1: output, 0: input|
|IM|0f00|0x00000000|w|Interrupt Mask Register; write 1/0 to enable/disable interrupts; check the interrupt flags table for more details|
|RIS|0f08|0x00000000|w|Raw Interrupt Status; reflects the current interrupts status;check the interrupt flags table for more details|
|MIS|0f04|0x00000000|w|Masked Interrupt Status; On a read, this register gives the current masked status value of the corresponding interrupt. A write has no effect; check the interrupt flags table for more details|
|IC|0f0c|0x00000000|w|Interrupt Clear Register; On a write of 1, the corresponding interrupt (both raw interrupt and masked interrupt, if enabled) is cleared; check the interrupt flags table for more details|
|IM|ff00|0x00000000|w|Interrupt Mask Register; write 1/0 to enable/disable interrupts; check the interrupt flags table for more details|
|RIS|ff08|0x00000000|w|Raw Interrupt Status; reflects the current interrupts status;check the interrupt flags table for more details|
|MIS|ff04|0x00000000|w|Masked Interrupt Status; On a read, this register gives the current masked status value of the corresponding interrupt. A write has no effect; check the interrupt flags table for more details|
|IC|ff0c|0x00000000|w|Interrupt Clear Register; On a write of 1, the corresponding interrupt (both raw interrupt and masked interrupt, if enabled) is cleared; check the interrupt flags table for more details|

### DATAI Register [Offset: 0x0, mode: r]

Expand Down
24 changes: 12 additions & 12 deletions fw/EF_GPIO8.c
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,10 @@

#include <EF_GPIO8.h>

void EF_GPIO8_setGclkEnable (uint32_t gpio_base, int value){
EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
gpio->GCLK = value;
}

// inline int GPIO_readData(enum port_types port) __attribute__((always_inline));
int EF_GPIO8_readData(uint32_t gpio_base){
Expand All @@ -12,12 +16,12 @@ int EF_GPIO8_readData(uint32_t gpio_base){

void EF_GPIO8_waitInput(uint32_t gpio_base, int data){
EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
while (EF_GPIO_readData(gpio_base) != data);
while (EF_GPIO8_readData(gpio_base) != data);
}

void EF_GPIO8_wait_InputPin(uint32_t gpio_base, int pin, int data){
EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
while ((EF_GPIO_readData(gpio_base) & (1 << pin)) != data);
while ((EF_GPIO8_readData(gpio_base) & (1 << pin)) != data);
}

// inline void GPIO_writeData(enum port_types port, int data) __attribute__((always_inline));
Expand Down Expand Up @@ -53,11 +57,7 @@ void EF_GPIO8_setPinDirection(uint32_t gpio_base, int pin, int dir){
gpio->DIR = directions;
}

void EF_GPIO8_setIM(uint32_t gpio_base, int data){

EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
gpio->im = data;
}


// Interrupts bits in RIS, MIS, IM, and ICR
// bit 0: TX FIFO is Empty
Expand All @@ -74,31 +74,31 @@ void EF_GPIO8_setIM(uint32_t gpio_base, int data){
int EF_GPIO8_getRIS(uint32_t gpio_base){

EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
return (gpio->ris);
return (gpio->RIS);
}

int EF_GPIO8_getMIS(uint32_t gpio_base){

EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
return (gpio->mis);
return (gpio->MIS);
}

void EF_GPIO8_setIM(uint32_t gpio_base, int mask){

EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
gpio->im |= mask;
gpio->IM |= mask;
}

int EF_GPIO8_getIM(uint32_t gpio_base){

EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
return (gpio->im);
return (gpio->IM);
}

void EF_GPIO8_setICR(uint32_t gpio_base, int mask){

EF_GPIO8_TYPE* gpio = (EF_GPIO8_TYPE*)gpio_base;
(gpio->icr) |= mask;
(gpio->IC) |= mask;
}

#endif // GPIO_H
3 changes: 3 additions & 0 deletions fw/EF_GPIO8.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,9 @@
#define GPIO8_INPUT 0
#define GPIO8_OUTPUT 1

void EF_GPIO8_setGclkEnable (uint32_t gpio_base, int value);


//! reads the input value of the GPIOs
/*!
\param gpio_base The base memory address of GPIO registers.
Expand Down
15 changes: 8 additions & 7 deletions fw/EF_GPIO8_regs.h
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/*
Copyright 2023 Efabless Corp.
Copyright 2024 Efabless Corp.
Author: Mohamed Shalan (mshalan@aucegypt.edu)
Author: Mohamed Shalan (mshalan@efabless.com)
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -65,11 +65,12 @@ typedef struct _EF_GPIO8_TYPE_ {
__R DATAI;
__W DATAO;
__W DIR;
__R reserved[957];
__RW im;
__R mis;
__R ris;
__W icr;
__R reserved_0[16317];
__RW IM;
__R MIS;
__R RIS;
__W IC;
__W GCLK;
} EF_GPIO8_TYPE;

#endif
Expand Down
6 changes: 4 additions & 2 deletions verify/uvm-python/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@ TOPLEVEL := top
MODULE ?= top_module
AHB_FILES ?= $(PWD)/../../hdl/rtl/bus_wrappers/EF_GPIO8_AHBL.pp.v
APB_FILES ?= $(PWD)/../../hdl/rtl/bus_wrappers/EF_GPIO8_APB.pp.v
WB_FILES ?= ""
WB_FILES ?= $(PWD)/../../hdl/rtl/bus_wrappers/EF_GPIO8_WB.pp.v
HDL_FILES ?= $(PWD)/../../hdl/rtl/EF_GPIO8.v $(PWD)/../../ip/IP_Utilities/rtl/aucohl_lib.v
VERILOG_SOURCES ?= $(PWD)/top.v $(AHB_FILES) $(APB_FILES) $(WB_FILES) $(HDL_FILES)
RTL_MACROS += ""
Expand All @@ -20,7 +20,9 @@ else ifeq ($(BUS_TYPE),AHB)
export RST_MAKEFILE = HRESETn
else ifeq ($(BUS_TYPE),WISHBONE)
RTL_MACROS += -DBUS_TYPE_WISHBONE
DESIGN_NAME = EF_GPIO8_wb
DESIGN_NAME = EF_GPIO8_WB
export CLK_MAKEFILE = clk_i
export RST_MAKEFILE = rst_i
endif
## netlist Gen
GL_MACROS += -DFUNCTIONAL $(RTL_MACROS) -DUNIT_DELAY=\#1
Expand Down
4 changes: 3 additions & 1 deletion verify/uvm-python/gpio8_ref_model/gpio8_ref_model.py
Original file line number Diff line number Diff line change
Expand Up @@ -164,12 +164,14 @@ async def send_irq_tr(self):
if irq_new and not self.irq: # irq changed from low to high
self.irq = 1
tr = bus_irq_item.type_id.create("tr", self)
tr.trg_irq = 1
tr.trg_irq = 1
uvm_info (self.tag, f"sending irq tr {tr}", UVM_LOW)
self.bus_irq_export.write(tr)
elif not irq_new and self.irq: # irq changed from high to low
self.irq = 0
tr = bus_irq_item.type_id.create("tr", self)
tr.trg_irq = 0
uvm_info (self.tag, f"sending irq tr {tr}", UVM_LOW)
self.bus_irq_export.write(tr)

self.mis_changed.clear()
Expand Down
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