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Feature gate [email protected] implementations, rename eh1 feature to embedded-hal #1273

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merged 4 commits into from
Mar 14, 2024
Merged

Feature gate [email protected] implementations, rename eh1 feature to embedded-hal #1273

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27425aa
Create an `embedded-hal-02` feature and gate implementations, rename …
jessebraham Mar 1, 2024
8de0a45
Use native `Delay` APIs in examples where applicable
jessebraham Mar 12, 2024
c5e2d8a
Fix example imports, be explicit about about `embedded-hal-02` featur…
jessebraham Mar 12, 2024
0eb1a84
Update `CHANGELOG.md`
jessebraham Mar 12, 2024
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1 change: 1 addition & 0 deletions esp-hal/CHANGELOG.md
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Expand Up @@ -17,6 +17,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

- Prefer mutable references over moving for DMA transactions (#1238)
- Support runtime interrupt binding, adapt GPIO driver (#1231)
- Renamed `eh1` feature to `embedded-hal`, feature-gated `[email protected]` trait implementations (#1273)

### Removed

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20 changes: 11 additions & 9 deletions esp-hal/Cargo.toml
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Expand Up @@ -27,8 +27,8 @@ embassy-sync = { version = "0.5.0", optional = true }
embassy-time-driver = { version = "0.1.0", optional = true }
embedded-can = { version = "0.4.1", optional = true }
embedded-dma = "0.2.0"
embedded-hal = { version = "0.2.7", features = ["unproven"] }
embedded-hal-1 = { version = "1.0.0", optional = true, package = "embedded-hal" }
embedded-hal-02 = { version = "0.2.7", optional = true, features = ["unproven"], package = "embedded-hal" }
embedded-hal = { version = "1.0.0", optional = true }
embedded-hal-async = { version = "1.0.0", optional = true }
embedded-hal-nb = { version = "1.0.0", optional = true }
embedded-io = { version = "0.6.1", optional = true }
Expand Down Expand Up @@ -74,7 +74,7 @@ esp-metadata = { version = "0.1.0", path = "../esp-metadata" }
serde = { version = "1.0.197", features = ["derive"] }

[features]
default = ["rt", "vectored"]
default = ["embedded-hal-02", "rt", "vectored"]

riscv = ["dep:riscv", "critical-section/restore-state-u8", "esp-riscv-rt?/zero-bss"]
xtensa = ["dep:xtensa-lx", "critical-section/restore-state-u32"]
Expand Down Expand Up @@ -151,8 +151,8 @@ rv-init-rtc-data = ["esp-riscv-rt?/init-rtc-fast-data", "esp-riscv-rt?/init-rtc-
## Enable support for asynchronous operation, with interfaces provided by
## `embedded-hal-async` and `embedded-io-async`.
async = [
"embedded-hal",
"embedded-hal-async",
"eh1",
"embassy-sync",
"embassy-futures",
"embedded-io",
Expand All @@ -164,13 +164,15 @@ defmt = [
"embassy-executor?/defmt",
"embassy-futures?/defmt",
"embassy-sync?/defmt",
"embedded-hal-1?/defmt-03",
"embedded-hal?/defmt-03",
"embedded-io/defmt-03",
"embedded-io-async?/defmt-03",
]
## Implement the traits defined in the `0.2.x` release of `embedded-hal`.
embedded-hal-02 = ["dep:embedded-hal-02"]
## Implement the traits defined in the `1.0.0` releases of `embedded-hal` and
## `embedded-hal-nb` for the relevant peripherals.
eh1 = ["embedded-hal-1", "embedded-hal-nb", "embedded-can"]
embedded-hal = ["dep:embedded-hal", "dep:embedded-hal-nb", "dep:embedded-can"]
## Implement the traits defined in `embedded-io` for certain peripherals.
embedded-io = ["dep:embedded-io"]
## Implement the `ufmt_write::uWrite` trait for certain peripherals.
Expand Down Expand Up @@ -211,11 +213,11 @@ psram-80mhz = []

#! ### Octal RAM Feature Flags
## Use externally connected Octal RAM (2MB).
opsram-2m = []
opsram-2m = []
## Use externally connected Octal RAM (4MB).
opsram-4m = []
opsram-4m = []
## Use externally connected Octal RAM (8MB).
opsram-8m = []
opsram-8m = []
## Use externally connected Octal RAM (16MB).
opsram-16m = []

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15 changes: 9 additions & 6 deletions esp-hal/src/analog/adc/esp32.rs
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Expand Up @@ -21,9 +21,10 @@ pub struct AdcPin<PIN, ADCI> {
_phantom: PhantomData<ADCI>,
}

impl<PIN, ADCI> embedded_hal::adc::Channel<ADCI> for AdcPin<PIN, ADCI>
#[cfg(feature = "embedded-hal-02")]
impl<PIN, ADCI> embedded_hal_02::adc::Channel<ADCI> for AdcPin<PIN, ADCI>
where
PIN: embedded_hal::adc::Channel<ADCI, ID = u8>,
PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8>,
{
type ID = u8;

Expand Down Expand Up @@ -346,15 +347,16 @@ impl<'d, ADC1> ADC<'d, ADC1> {
}
}

impl<'d, ADCI, PIN> embedded_hal::adc::OneShot<ADCI, u16, AdcPin<PIN, ADCI>> for ADC<'d, ADCI>
#[cfg(feature = "embedded-hal-02")]
impl<'d, ADCI, PIN> embedded_hal_02::adc::OneShot<ADCI, u16, AdcPin<PIN, ADCI>> for ADC<'d, ADCI>
where
PIN: embedded_hal::adc::Channel<ADCI, ID = u8>,
PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8>,
ADCI: RegisterAccess,
{
type Error = ();

fn read(&mut self, _pin: &mut AdcPin<PIN, ADCI>) -> nb::Result<u16, Self::Error> {
use embedded_hal::adc::Channel;
use embedded_hal_02::adc::Channel;

if self.attenuations[AdcPin::<PIN, ADCI>::channel() as usize].is_none() {
panic!(
Expand Down Expand Up @@ -405,7 +407,8 @@ macro_rules! impl_adc_interface {
const CHANNEL: u8 = $channel;
}

impl embedded_hal::adc::Channel<$adc> for crate::gpio::$pin<crate::gpio::Analog> {
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::adc::Channel<$adc> for crate::gpio::$pin<crate::gpio::Analog> {
type ID = u8;

fn channel() -> u8 { $channel }
Expand Down
15 changes: 9 additions & 6 deletions esp-hal/src/analog/adc/riscv.rs
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Expand Up @@ -117,9 +117,10 @@ pub struct AdcPin<PIN, ADCI, CS = ()> {
_phantom: PhantomData<ADCI>,
}

impl<PIN, ADCI, CS> embedded_hal::adc::Channel<ADCI> for AdcPin<PIN, ADCI, CS>
#[cfg(feature = "embedded-hal-02")]
impl<PIN, ADCI, CS> embedded_hal_02::adc::Channel<ADCI> for AdcPin<PIN, ADCI, CS>
where
PIN: embedded_hal::adc::Channel<ADCI, ID = u8>,
PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8>,
{
type ID = u8;

Expand Down Expand Up @@ -548,17 +549,18 @@ impl AdcCalEfuse for crate::peripherals::ADC2 {
}
}

impl<'d, ADCI, PIN, CS> embedded_hal::adc::OneShot<ADCI, u16, AdcPin<PIN, ADCI, CS>>
#[cfg(feature = "embedded-hal-02")]
impl<'d, ADCI, PIN, CS> embedded_hal_02::adc::OneShot<ADCI, u16, AdcPin<PIN, ADCI, CS>>
for ADC<'d, ADCI>
where
PIN: embedded_hal::adc::Channel<ADCI, ID = u8>,
PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8>,
ADCI: RegisterAccess,
CS: AdcCalScheme<ADCI>,
{
type Error = ();

fn read(&mut self, pin: &mut AdcPin<PIN, ADCI, CS>) -> nb::Result<u16, Self::Error> {
use embedded_hal::adc::Channel;
use embedded_hal_02::adc::Channel;

if self.attenuations[AdcPin::<PIN, ADCI>::channel() as usize].is_none() {
panic!(
Expand Down Expand Up @@ -639,7 +641,8 @@ macro_rules! impl_adc_interface {
const CHANNEL: u8 = $channel;
}

impl embedded_hal::adc::Channel<$adc> for crate::gpio::$pin<crate::gpio::Analog> {
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::adc::Channel<$adc> for crate::gpio::$pin<crate::gpio::Analog> {
type ID = u8;

fn channel() -> u8 { $channel }
Expand Down
15 changes: 9 additions & 6 deletions esp-hal/src/analog/adc/xtensa.rs
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Expand Up @@ -86,9 +86,10 @@ pub struct AdcPin<PIN, ADCI, CS = ()> {
_phantom: PhantomData<ADCI>,
}

impl<PIN, ADCI, CS> embedded_hal::adc::Channel<ADCI> for AdcPin<PIN, ADCI, CS>
#[cfg(feature = "embedded-hal-02")]
impl<PIN, ADCI, CS> embedded_hal_02::adc::Channel<ADCI> for AdcPin<PIN, ADCI, CS>
where
PIN: embedded_hal::adc::Channel<ADCI, ID = u8>,
PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8>,
{
type ID = u8;

Expand Down Expand Up @@ -637,17 +638,18 @@ impl AdcCalEfuse for crate::peripherals::ADC2 {
}
}

impl<'d, ADCI, PIN, CS> embedded_hal::adc::OneShot<ADCI, u16, AdcPin<PIN, ADCI, CS>>
#[cfg(feature = "embedded-hal-02")]
impl<'d, ADCI, PIN, CS> embedded_hal_02::adc::OneShot<ADCI, u16, AdcPin<PIN, ADCI, CS>>
for ADC<'d, ADCI>
where
PIN: embedded_hal::adc::Channel<ADCI, ID = u8>,
PIN: embedded_hal_02::adc::Channel<ADCI, ID = u8>,
ADCI: RegisterAccess,
CS: AdcCalScheme<ADCI>,
{
type Error = ();

fn read(&mut self, pin: &mut AdcPin<PIN, ADCI, CS>) -> nb::Result<u16, Self::Error> {
use embedded_hal::adc::Channel;
use embedded_hal_02::adc::Channel;

if self.attenuations[AdcPin::<PIN, ADCI>::channel() as usize].is_none() {
panic!(
Expand Down Expand Up @@ -706,7 +708,8 @@ macro_rules! impl_adc_interface {
const CHANNEL: u8 = $channel;
}

impl embedded_hal::adc::Channel<$adc> for crate::gpio::$pin<crate::gpio::Analog> {
#[cfg(feature = "embedded-hal-02")]
impl embedded_hal_02::adc::Channel<$adc> for crate::gpio::$pin<crate::gpio::Analog> {
type ID = u8;

fn channel() -> u8 { $channel }
Expand Down
25 changes: 18 additions & 7 deletions esp-hal/src/delay.rs
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Expand Up @@ -18,9 +18,9 @@
//! delay.delay_ms(1000 as u32);
//! ```
//!
//! [DelayMs]: embedded_hal::blocking::delay::DelayMs
//! [DelayUs]: embedded_hal::blocking::delay::DelayUs
//! [embedded-hal]: https://docs.rs/embedded-hal/latest/embedded_hal/
//! [DelayMs]: embedded_hal_02::blocking::delay::DelayMs
//! [DelayUs]: embedded_hal_02::blocking::delay::DelayUs
//! [embedded-hal]: https://docs.rs/embedded-hal/0.2.7/embedded_hal/index.html

use fugit::HertzU64;

Expand All @@ -33,7 +33,17 @@ pub struct Delay {
freq: HertzU64,
}

impl<T> embedded_hal::blocking::delay::DelayMs<T> for Delay
impl Delay {
/// Delay for the specified number of milliseconds
pub fn delay_millis(&self, ms: u32) {
for _ in 0..ms {
self.delay_micros(1000u32);
}
}
}

#[cfg(feature = "embedded-hal-02")]
impl<T> embedded_hal_02::blocking::delay::DelayMs<T> for Delay
where
T: Into<u32>,
{
Expand All @@ -44,7 +54,8 @@ where
}
}

impl<T> embedded_hal::blocking::delay::DelayUs<T> for Delay
#[cfg(feature = "embedded-hal-02")]
impl<T> embedded_hal_02::blocking::delay::DelayUs<T> for Delay
where
T: Into<u32>,
{
Expand All @@ -53,8 +64,8 @@ where
}
}

#[cfg(feature = "eh1")]
impl embedded_hal_1::delay::DelayNs for Delay {
#[cfg(feature = "embedded-hal")]
impl embedded_hal::delay::DelayNs for Delay {
fn delay_ns(&mut self, ns: u32) {
self.delay_nanos(ns);
}
Expand Down
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