Migrate I8080 driver to a move based API

esp-hal/CHANGELOG.md

@@ -23,6 +23,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - You can now use `Input`, `Output`, `OutputOpenDrain` and `Flex` pins as EXTI and RTCIO wakeup sources (#2095)
 - Added `Rtc::set_current_time` to allow setting RTC time, and `Rtc::current_time` to getting RTC time while taking into account boot time (#1883)
 - Added APIs to allow connecting signals through the GPIO matrix. (#2128)
+- Allow I8080 transfers to be cancelled on the spot (#2191)
 - Implement `TryFrom<u32>` for `ledc::timer::config::Duty` (#1984)
 
 ### Changed
@@ -40,6 +41,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - ESP32: Added support for touch sensing on GPIO32 and 33 (#2109)
 - Removed gpio pin generics from I8080 driver type. (#2171)
 - I8080 driver now decides bus width at transfer time rather than construction time. (#2171)
+- Migrate the I8080 driver to a move based API (#2191)
 - Replaced `AnyPin` with `InputSignal` and `OutputSignal` and renamed `ErasedPin` to `AnyPin` (#2128)
 - Replaced the `ErasedTimer` enum with the `AnyTimer` struct. (#?)
 - Changed the parameters of `Spi::with_pins` to no longer be optional (#2133)

esp-hal/MIGRATING-0.20.md

@@ -189,12 +189,29 @@ The I8080 driver no longer holds on to pins in its type definition.
 + let _: I8080<'a, DmaChannel3, Blocking>;
 ```
 
-## I8080 start transfer type inference
+## I8080 transfer API changes
 
-The I8080 driver now decides bus width at transfer time, which means you don't get inference.
+- The I8080 driver now decides bus width at transfer time, which means you don't get type inference anymore.
+- Starting a transfer moves the driver into the transfer object, allowing you to store it in a `static` or struct.
+- The transfer API no longer works with plain slices, it now works with `DmaTxBuffer`s which allow to bring your own DMA data structure and implement efficient queueing of transfers.
+- The three transfer methods (`send`, `send_dma`, `send_dma_async`) have been merged into one `send` method.
 
 ```diff
-let mut i8080 = I8080::new(....);
+let (_, _, tx_buffer, tx_descriptors) = dma_buffers!(0, 32678);
++ let mut dma_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
+
+let mut i8080 = I8080::new(
+    lcd_cam.lcd,
+    channel.tx,
+-   tx_descriptors,
+    tx_pins,
+    20.MHz(),
+    Config::default(),
+)
+
 - i8080.send(0x12, 0, &[0, 1, 2, 3, 4]);
-+ i8080.send(0x12u8, 0, &[0, 1, 2, 3, 4]);
++ dma_buf.fill(&[0, 1, 2, 3, 4]);
++ let transfer = i8080.send(0x12u8, 0, dma_buf).unwrap();
++ // transfer.wait_for_done().await;
++ (_, i8080, dma_buf) = transfer.wait();
 ```

esp-hal/src/dma/gdma.rs

@@ -167,6 +167,12 @@ impl<const N: u8> RegisterAccess for Channel<N> {
             .modify(|_, w| w.outlink_start().set_bit());
     }
 
+    fn stop_out() {
+        Self::ch()
+            .out_link()
+            .modify(|_, w| w.outlink_stop().set_bit());
+    }
+
     fn clear_ch_out_done() {
         Self::out_int()
             .clr()

esp-hal/src/dma/mod.rs

@@ -1519,6 +1519,8 @@ pub trait TxPrivate: crate::private::Sealed {
 
     fn start_transfer(&mut self) -> Result<(), DmaError>;
 
+    fn stop_transfer(&mut self);
+
     #[cfg(esp32s3)]
     fn set_ext_mem_block_size(&self, size: DmaExtMemBKSize);
 
@@ -1594,6 +1596,10 @@ where
         }
     }
 
+    fn stop_transfer(&mut self) {
+        R::stop_out()
+    }
+
     fn clear_ch_out_done(&self) {
         R::clear_ch_out_done();
     }
@@ -1713,6 +1719,10 @@ where
         self.tx_impl.start_transfer()
     }
 
+    fn stop_transfer(&mut self) {
+        self.tx_impl.stop_transfer();
+    }
+
     #[cfg(esp32s3)]
     fn set_ext_mem_block_size(&self, size: DmaExtMemBKSize) {
         CH::Channel::set_out_ext_mem_block_size(size);
@@ -1806,6 +1816,7 @@ pub trait RegisterAccess: crate::private::Sealed {
     fn has_out_descriptor_error() -> bool;
     fn set_out_peripheral(peripheral: u8);
     fn start_out();
+    fn stop_out();
     fn clear_ch_out_done();
     fn is_ch_out_done_set() -> bool;
     fn listen_ch_out_done();

esp-hal/src/dma/pdma.rs

@@ -122,6 +122,11 @@ macro_rules! ImplSpiChannel {
                     spi.dma_out_link().modify(|_, w| w.outlink_start().set_bit());
                 }
 
+                fn stop_out() {
+                    let spi = unsafe { &*crate::peripherals::[<SPI $num>]::PTR };
+                    spi.dma_out_link().modify(|_, w| w.outlink_stop().set_bit());
+                }
+
                 fn clear_ch_out_done() {
                     let spi = unsafe { &*crate::peripherals::[<SPI $num>]::PTR };
                     spi.dma_int_clr().write(|w| w.out_done().clear_bit_by_one());
@@ -516,6 +521,11 @@ macro_rules! ImplI2sChannel {
                     reg_block.out_link().modify(|_, w| w.outlink_start().set_bit());
                 }
 
+                fn stop_out() {
+                    let reg_block = unsafe { &*crate::peripherals::[<$peripheral>]::PTR };
+                    reg_block.out_link().modify(|_, w| w.outlink_stop().set_bit());
+                }
+
                 fn clear_ch_out_done() {
                     let reg_block = unsafe { &*crate::peripherals::[<$peripheral>]::PTR };
                     reg_block.int_clr().write(|w| w.out_done().clear_bit_by_one());