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Added instrumentation of vector TCG operations #38

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Feb 22, 2024
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1a9d04e
make SymQEMU Dockerfile rely on SymCC Dockerfile
damienmaier Feb 11, 2024
18fc98c
Add some documentation, fix typos in doc, and wrap to 80 columns
aurelf Feb 15, 2024
c434dfd
remove unncessary line in Dockerfile
damienmaier Feb 16, 2024
a9cbdff
write a wrong test expected output to demonstrate that this makes the…
damienmaier Feb 16, 2024
40ffbc2
revert previous commit
damienmaier Feb 16, 2024
6f6df2f
add util function for vec expr
damienmaier Nov 29, 2023
0e5af2e
instrument tcg_gen_mov_vec
damienmaier Nov 29, 2023
3989992
instumented tcg_gen_ld_vec
damienmaier Nov 29, 2023
af8fa7b
add tcgv_vec_expr util function
damienmaier Nov 29, 2023
0165c3f
simplify sym_store_host helper
damienmaier Nov 29, 2023
1437949
instrumented tcg_gen_st_vec
damienmaier Nov 29, 2023
a338746
instrument tcg_gen_stl_vec
damienmaier Nov 29, 2023
29ec563
add malloc and free helper functions
damienmaier Nov 30, 2023
64f19e6
util functions for vector intrumentation
damienmaier Nov 30, 2023
ab6b435
instrumented tcg_gen_and_vec
damienmaier Nov 30, 2023
45b07f5
implemented sym helper for and vec
damienmaier Nov 30, 2023
0350124
generalized sym_and_vec implementation
damienmaier Dec 1, 2023
62d1019
refactor
damienmaier Dec 1, 2023
da2ee36
refactor
damienmaier Dec 1, 2023
0a1f32b
fix free temp
damienmaier Dec 1, 2023
73a618a
instrumented vec or,xor,add,sub,mul
damienmaier Dec 1, 2023
ad3e1ee
typo
damienmaier Dec 1, 2023
bd8f5a5
make vector operations andc,orc,nand,nor,eqv be built with instrument…
damienmaier Dec 2, 2023
197924f
make vector operations not and neg be built with instrumented operations
damienmaier Dec 2, 2023
b4d10cf
make vector operations abs be built with instrumented operations
damienmaier Dec 2, 2023
4647e1a
refactor
damienmaier Dec 2, 2023
8186dd6
refactor
damienmaier Dec 2, 2023
eb45cd6
add build_symbol_for_vector_int32_op function
damienmaier Dec 2, 2023
50251f9
instrumented vec vec shifts and rotates ops
damienmaier Dec 2, 2023
1636af2
instrumented vec i32 shifts and rotates ops
damienmaier Dec 2, 2023
0ec22e4
instrumented vec immediate shifts and rotates ops
damienmaier Dec 2, 2023
55f9de4
refactor
damienmaier Dec 3, 2023
d8074f5
add support of helper functions with 8 and 9 args
damienmaier Dec 3, 2023
0f9e961
instrumented tcg_gen_cmp_vec
damienmaier Dec 3, 2023
f9cf587
concretize not yet instrumented vec ops results to avoid crash
damienmaier Dec 3, 2023
eaea586
fix bux related to expr version of constants and add assert to avoid …
damienmaier Dec 3, 2023
8aa48d6
fix vector load bug
damienmaier Dec 3, 2023
49a0157
fix split_symbol function, add asserts
damienmaier Dec 3, 2023
89cc562
fix extract symbol logic
damienmaier Dec 4, 2023
82a6792
fix endianess issue in apply_op_and_merge function
damienmaier Dec 5, 2023
d3b0386
instrumented saturating signed/unsigned sub/add vec instructions
damienmaier Dec 5, 2023
ff7406b
make sure cmpsel and bitsel instructions are generated using already …
damienmaier Dec 5, 2023
065eee4
remove forgotten concretization
damienmaier Dec 5, 2023
f7d0447
instrumented tcg_gen_dup_i64_vec,tcg_gen_dup_i32_vec functions
damienmaier Dec 5, 2023
6f5b312
instrumented min max functions
damienmaier Dec 5, 2023
c5419d0
instrumented tcg_gen_dup_mem_vec
damienmaier Dec 5, 2023
01b0b10
fix wront assert in sym_load_and_duplicate_into_vec
damienmaier Dec 6, 2023
37491b2
refactor : put vec helpers in separate file
damienmaier Dec 16, 2023
877692f
documentation and refactoring
damienmaier Dec 17, 2023
d9796f9
refactor
damienmaier Jan 10, 2024
b29f504
fix rotate functions for PR
damienmaier Feb 4, 2024
0529b3b
added todo comments to clarify situation for indirectly instrumented …
damienmaier Feb 11, 2024
1ea43b5
add todo for returning expressions instad of pushing path constraints
damienmaier Feb 11, 2024
569f996
mention files related to vec instructions in README
damienmaier Feb 11, 2024
3c35a2e
Add asprintf test program
damienmaier Feb 16, 2024
854d82d
typo fixes in README.md
aurelf Feb 17, 2024
51bbf36
Minor formatting fixes
aurelf Feb 17, 2024
5945bd7
Update tcg-runtime-sym-vec.c
aurelf Feb 22, 2024
772c202
Adding QEMU own checks to Dockerfile (CI) and improve README.md (#43)
aurelf Feb 19, 2024
393104f
Adding SymQEMU unit test suite to CI (#44)
aurelf Feb 22, 2024
087b98d
Update SymQEMU unit tests (check-sym-runtime.c)
aurelf Feb 22, 2024
c9a79af
Merge branch 'master' into pr-vec-instrumentation
aurelf Feb 22, 2024
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16 changes: 9 additions & 7 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -146,13 +146,15 @@ Also, refer to [QEMU's own tests suite documentation](https://www.qemu.org/docs/

## Documentation

The [paper](http://www.s3.eurecom.fr/tools/symbolic_execution/symqemu.html)
contains details on how SymQEMU works. A large part of the implementation is the
run-time support in `accel/tcg/tcg-runtime-sym.{c,h}` (which delegates any
actual symbolic computation to SymCC's symbolic backend), and we have modified
most code-generating functions in `tcg/tcg-op.c` to emit calls to the runtime.
For development, configure with `--enable-debug` for run-time assertions; there
are tests for the symbolic run-time support in `tests/check-sym-runtime.c`.
The [paper](http://www.s3.eurecom.fr/tools/symbolic_execution/symqemu.html) contains
details on how SymQEMU works. A large part of the implementation is the run-time support
in `accel/tcg/tcg-runtime-sym.{c,h}` and `accel/tcg/tcg-runtime-sym-vec.{c,h}` (which
delegates any actual symbolic computation to SymCC's symbolic backend), and we have
modified most code-generating functions in `tcg/tcg-op.c`, `tcg/tcg-op-vec.c` and
`include/tcg/tcg-op-common.h` to emit calls to the runtime.

For development, configure with `--enable-debug` for run-time assertions; there are tests
for the symbolic run-time support in `tests/check-sym-runtime.c`.

More information about the port to QEMU 8 and internals of (Sym)QEMU
can be found in the QEMU 8 merge commit message
Expand Down
2 changes: 2 additions & 0 deletions accel/tcg/meson.build
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,8 @@ tcg_ss.add(files(
'tcg-runtime-gvec.c',
'tcg-runtime.c',
'tcg-runtime-sym.c',
'tcg-runtime-sym-vec.c',
'tcg-runtime-sym-common.c',
'translate-all.c',
'translator.c',
))
Expand Down
95 changes: 95 additions & 0 deletions accel/tcg/tcg-runtime-sym-common.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,95 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
#include "qemu/qemu-print.h"
#include "tcg/tcg.h"
#include "exec/translation-block.h"

#include "accel/tcg/tcg-runtime-sym-common.h"

/* Include the symbolic backend, using void* as expression type. */

#define SymExpr void*
#include "RuntimeCommon.h"

void *build_and_push_path_constraint(CPUArchState *env, void *arg1_expr, void *arg2_expr, uint32_t comparison_operator, uint8_t is_taken){
void *(*handler)(void *, void*);
switch (comparison_operator) {
case TCG_COND_EQ:
handler = _sym_build_equal;
break;
case TCG_COND_NE:
handler = _sym_build_not_equal;
break;
case TCG_COND_LT:
handler = _sym_build_signed_less_than;
break;
case TCG_COND_GE:
handler = _sym_build_signed_greater_equal;
break;
case TCG_COND_LE:
handler = _sym_build_signed_less_equal;
break;
case TCG_COND_GT:
handler = _sym_build_signed_greater_than;
break;
case TCG_COND_LTU:
handler = _sym_build_unsigned_less_than;
break;
case TCG_COND_GEU:
handler = _sym_build_unsigned_greater_equal;
break;
case TCG_COND_LEU:
handler = _sym_build_unsigned_less_equal;
break;
case TCG_COND_GTU:
handler = _sym_build_unsigned_greater_than;
break;
default:
g_assert_not_reached();
}

void *condition_symbol = handler(arg1_expr, arg2_expr);
_sym_push_path_constraint(condition_symbol, is_taken, get_pc(env));

return condition_symbol;
}

/* Architecture-independent way to get the program counter */
target_ulong get_pc(CPUArchState *env)
{
target_ulong pc, cs_base;
uint32_t flags;

cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);

return pc;
}

void *sym_rotate_left(void *arg1_expr, void *arg2_expr) {
/* The implementation follows the alternative implementation of
* tcg_gen_rotl_i64 in tcg-op.c (which handles architectures that don't
* support rotl directly). */

uint8_t bits = _sym_bits_helper(arg1_expr);
return _sym_build_or(
_sym_build_shift_left(arg1_expr, arg2_expr),
_sym_build_logical_shift_right(
arg1_expr,
_sym_build_sub(_sym_build_integer(bits, bits), arg2_expr)));
}

void *sym_rotate_right(void *arg1_expr, void *arg2_expr) {

/* The implementation follows the alternative implementation of
* tcg_gen_rotr_i64 in tcg-op.c (which handles architectures that don't
* support rotr directly). */

uint8_t bits = _sym_bits_helper(arg1_expr);
return _sym_build_or(
_sym_build_logical_shift_right(arg1_expr, arg2_expr),
_sym_build_shift_left(
arg1_expr,
_sym_build_sub(_sym_build_integer(bits, bits), arg2_expr)));
}
4 changes: 4 additions & 0 deletions accel/tcg/tcg-runtime-sym-common.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
void *build_and_push_path_constraint(CPUArchState *env, void *arg1_expr, void *arg2_expr, uint32_t comparison_operator, uint8_t is_taken);
target_ulong get_pc(CPUArchState *env);
void *sym_rotate_left(void *arg1_expr, void *arg2_expr);
void *sym_rotate_right(void *arg1_expr, void *arg2_expr);
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