arcv: Update expect scripts of dejagnu for ARC-V targets

[qwersem]

These updates provide commands to check compilation and execution, just like the abs-1.x0 test:

/project/toolchains/riscv64-unknown-elf/bin/riscv64-elf-gcc  \
    /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/abs-1.c \
    /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/abs-1-lib.c \
    /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/lib/main.c  \
    -mtune=rmx100   -dumpbase "" -fdiagnostics-plain-output  -w  -O0  -fno-builtin-abs   \
    --specs=semihost.specs --specs=arcv.specs \
    -mabi=ilp32 -march=rv32im_zba_zbb_zbs_zca_zcb_zcmp_zicsr -T arcv.ld  \
    -Wl,--defsym=__DEFAULT_HEAP_SIZE=256m -Wl,--defsym=__DEFAULT_STACK_SIZE=1024m  \
    -Wl,-wrap,exit -Wl,-wrap,_exit -Wl,-wrap,main -Wl,-wrap,abort -Wl,gcc_tg.o -lm  \
    -o /project/shared-scripts/dejagnu/../../out/dejagnu/abs-1.x0

mwdt_2023.12/nSIM/nSIM_64//bin/nsimdrv \
    -on nsim_isa_enable_timer_0 -on nsim_isa_enable_timer_1 -off invalid_instruction_interrupt \
    -off memory_exception_interrupt -p nsim_isa_family=rv32 \
    -p nsim_isa_ext=-all.i.zicsr.zifencei.zihintpause.b.zca.zcb.zcmp.zcmt.a.m.zbb \
    -p nsim_semihosting=1 -off=enable_exceptions -p nsim_isa_shift_option=0 \
    -p nsim_isa_bitscan_option=0 \
    /project/shared-scripts/dejagnu/../../out/dejagnu/abs-1.x0

Dejagnu detailed output for the test abs-1.x0:

...
Testing gcc.c-torture/execute/builtins/abs-1.c,  -O0 
Checking /project/toolchains/riscv64-unknown-elf/bin/riscv64-elf-gcc
file /project/toolchains/riscv64-unknown-elf/bin/riscv64-elf-gcc is executable
doing compile
Invoking the compiler as /project/toolchains/riscv64-unknown-elf/bin/riscv64-elf-gcc  /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/abs-1.c /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/abs-1-lib.c /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/lib/main.c  -mtune=rmx100   -dumpbase "" -fdiagnostics-plain-output  -w  -O0  -fno-builtin-abs   --specs=semihost.specs --specs=arcv.specs -mabi=ilp32 -march=rv32im_zba_zbb_zbs_zca_zcb_zcmp_zicsr -T arcv.ld  -Wl,--defsym=__DEFAULT_HEAP_SIZE=256m -Wl,--defsym=__DEFAULT_STACK_SIZE=1024m  -Wl,-wrap,exit -Wl,-wrap,_exit -Wl,-wrap,main -Wl,-wrap,abort -Wl,gcc_tg.o -lm  -o /project/shared-scripts/dejagnu/../../out/dejagnu/abs-1.x0
Setting timeout to 300
Executing on host: /project/toolchains/riscv64-unknown-elf/bin/riscv64-elf-gcc  /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/abs-1.c /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/abs-1-lib.c /project/sources/src/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/lib/main.c  -mtune=rmx100   -dumpbase "" -fdiagnostics-plain-output  -w  -O0  -fno-builtin-abs   --specs=semihost.specs --specs=arcv.specs -mabi=ilp32 -march=rv32im_zba_zbb_zbs_zca_zcb_zcmp_zicsr -T arcv.ld  -Wl,--defsym=__DEFAULT_HEAP_SIZE=256m -Wl,--defsym=__DEFAULT_STACK_SIZE=1024m  -Wl,-wrap,exit -Wl,-wrap,_exit -Wl,-wrap,main -Wl,-wrap,abort -Wl,gcc_tg.o -lm  -o /project/shared-scripts/dejagnu/../../out/dejagnu/abs-1.x0    (timeout = 300)
pid is 750116 -750116
pid is -1
waitres is 750116 exp8 0 0
output is  status 0
Checking pattern "sparc-*-sunos*" with x86_64-pc-linux-gnu
Checking pattern "alpha*-*-*" with x86_64-pc-linux-gnu
Checking pattern "hppa*-*-hpux*" with x86_64-pc-linux-gnu
Checking pattern "sparc-*-sunos*" with x86_64-pc-linux-gnu
Checking pattern "alpha*-*-*" with x86_64-pc-linux-gnu
Checking pattern "hppa*-*-hpux*" with x86_64-pc-linux-gnu
check_cached_effective_target exceptions_enabled: returning 1 for arc-sim-nsimdrv
Checking x86_64-pc-linux-gnu against x86_64-pc-linux-gnu
Checking /global/apps/arcnsim_2023.03/nSIM_64/bin/nsimdrv
file /global/apps/arcnsim_2023.03/nSIM_64/bin/nsimdrv is executable
spawning command  /global/apps/arcnsim_2023.03/nSIM_64/bin/nsimdrv -on nsim_isa_enable_timer_0 -on nsim_isa_enable_timer_1 -off invalid_instruction_interrupt -off memory_exception_interrupt -p nsim_isa_family=rv32 -p nsim_isa_ext=-all.i.zicsr.zifencei.zihintpause.b.zca.zcb.zcmp.zcmt.a.m.zbb -p nsim_semihosting=1 -off=enable_exceptions -p nsim_isa_shift_option=0 -p nsim_isa_bitscan_option=0 /project/shared-scripts/dejagnu/../../out/dejagnu/abs-1.x0 
Closing the remote shell exp8
pid is -1
Shell closed.
Output is 
*** EXIT code 0

Return status was: 0
...

[shahab-vahedi]

This commit does not follow the existing indentation. Please use GNU coding style. There probably exist a plugin for your editor to take care of that.

[qwersem]

Hi @shahab-vahedi ,

I don't see any code style rules for dejagnu tests in this project which anyone followed in previous commits. Let's add a Tcl linter to CI for dejagnu scripts related to ARC and nSIM, see here. I think this linter matches with GNU Coding Standards (Chapter 5).

[shahab-vahedi]

Hi @shahab-vahedi ,

I don't see any code style rules for dejagnu tests in this project which anyone followed in previous commits. Let's add a Tcl linter to CI for dejagnu scripts related to ARC and nSIM, see here. I think this linter matches with GNU Coding Standards (Chapter 5).

Indeed, there isn't any. However, eye-balling the code I could immediately notice the discrepancy between the proposed change and existing code base. Thanks for fixing it by the way.

I fancy the idea of adding the CI linter. However, as a different PR.

[shahab-vahedi]

LGTM. Thanks!