drivers: imx_mu: read RX and TX buffer sizes from MU configuation reg…

…ister

On i.MX8ULP, there are multiple MUs with a different number of RX and TX
buffer sizes. To make the driver generic for all MUs on this platform, get
the RX and TX buffer size from the MU configuration register.

The configuration remains static for i.MX8Q.

Signed-off-by: Sahil Malhotra <[email protected]>
Signed-off-by: Clement Faure <[email protected]>
Acked-by: Jens Wiklander <[email protected]>

core/drivers/imx/mu/imx_mu.c

@@ -66,7 +66,7 @@ static TEE_Result imx_mu_receive_msg(vaddr_t base, struct imx_mu_msg *msg)
 		return TEE_ERROR_BAD_FORMAT;
 	}
 
-	nb_channel = imx_mu_plat_get_rx_channel();
+	nb_channel = imx_mu_plat_get_rx_channel(base);
 
 	for (count = 1; count < msg->header.size; count++) {
 		res = imx_mu_plat_receive(base, count % nb_channel,
@@ -103,7 +103,7 @@ static TEE_Result imx_mu_send_msg(vaddr_t base, struct imx_mu_msg *msg)
 	if (res)
 		return res;
 
-	nb_channel = imx_mu_plat_get_tx_channel();
+	nb_channel = imx_mu_plat_get_tx_channel(base);
 
 	for (count = 1; count < msg->header.size; count++) {
 		res = imx_mu_plat_send(base, count % nb_channel,

core/drivers/imx/mu/imx_mu_8q.c

@@ -42,12 +42,12 @@ static TEE_Result mu_wait_for(vaddr_t addr, uint32_t mask)
 	return TEE_SUCCESS;
 }
 
-unsigned int imx_mu_plat_get_rx_channel(void)
+unsigned int imx_mu_plat_get_rx_channel(vaddr_t base __unused)
 {
 	return MU_MAX_CHANNEL;
 }
 
-unsigned int imx_mu_plat_get_tx_channel(void)
+unsigned int imx_mu_plat_get_tx_channel(vaddr_t base __unused)
 {
 	return MU_MAX_CHANNEL;
 }

core/drivers/imx/mu/imx_mu_8ulp.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-2-Clause
 /*
- * Copyright 2022 NXP
+ * Copyright 2022-2023 NXP
  */
 #include <drivers/imx_mu.h>
 #include <initcall.h>
@@ -10,6 +10,7 @@
 
 #include "imx_mu_platform.h"
 
+#define MU_PAR 0x004
 #define MU_TCR		  0x120
 #define MU_TSR		  0x124
 #define MU_RCR		  0x128
@@ -18,8 +19,10 @@
 #define MU_RR(n)	  (0x280 + 0x4 * (n))
 #define MU_TSR_TE(n)	  BIT32(n)
 #define MU_RSR_RF(n)	  BIT32(n)
-#define MU_MAX_RX_CHANNEL 4
-#define MU_MAX_TX_CHANNEL 8
+
+#define RR_NUM_MASK GENMASK_32(15, 8)
+#define RR_NUM_SHIFT 8
+#define TR_NUM_MASK GENMASK_32(7, 0)
 
 static TEE_Result mu_wait_for(vaddr_t addr, uint32_t mask)
 {
@@ -37,19 +40,19 @@ static TEE_Result mu_wait_for(vaddr_t addr, uint32_t mask)
 	return TEE_SUCCESS;
 }
 
-unsigned int imx_mu_plat_get_rx_channel(void)
+unsigned int imx_mu_plat_get_rx_channel(vaddr_t base)
 {
-	return MU_MAX_RX_CHANNEL;
+	return (io_read32(base + MU_PAR) & RR_NUM_MASK) >> RR_NUM_SHIFT;
 }
 
-unsigned int imx_mu_plat_get_tx_channel(void)
+unsigned int imx_mu_plat_get_tx_channel(vaddr_t base)
 {
-	return MU_MAX_TX_CHANNEL;
+	return io_read32(base + MU_PAR) & TR_NUM_MASK;
 }
 
 TEE_Result imx_mu_plat_send(vaddr_t base, unsigned int index, uint32_t msg)
 {
-	assert(index < MU_MAX_TX_CHANNEL);
+	assert(index < imx_mu_plat_get_tx_channel(base));
 
 	/* Wait TX register to be empty */
 	if (mu_wait_for(base + MU_TSR, MU_TSR_TE(index)))
@@ -62,7 +65,7 @@ TEE_Result imx_mu_plat_send(vaddr_t base, unsigned int index, uint32_t msg)
 
 TEE_Result imx_mu_plat_receive(vaddr_t base, unsigned int index, uint32_t *msg)
 {
-	assert(index < MU_MAX_RX_CHANNEL);
+	assert(index < imx_mu_plat_get_rx_channel(base));
 
 	/* Wait RX register to be full */
 	if (mu_wait_for(base + MU_RSR, MU_RSR_RF(index)))

core/drivers/imx/mu/imx_mu_platform.h

@@ -9,12 +9,12 @@
 /*
  * Return the number of reception channels
  */
-unsigned int imx_mu_plat_get_rx_channel(void);
+unsigned int imx_mu_plat_get_rx_channel(vaddr_t base);
 
 /*
  * Return the number of transmission channels
  */
-unsigned int imx_mu_plat_get_tx_channel(void);
+unsigned int imx_mu_plat_get_tx_channel(vaddr_t base);
 
 /*
  * Send a 32bits word via the MU