Add FlexIO clock gates

1000 clock gates checked against RMs for the 1010, 1020, 1050, and 1060
MCUs. 1100 clock gates checked against 1170 RM.

Inside of 1000-series chip modules, there are collections of clock gates
aggregated by their root clock. These collections can help when bulk
changing clock gates before a root clock update. This commit does not
implement a corresponding collection for FlexIO root clocks. Besides the
IPG, the FlexIO root clocks are dedicated for their FlexIO peripheral
instance. Users can change the single corresponding clock gate before
updating the root clock. (Ignoring the edge case that FlexIO3 on the
1060 uses the FlexIO2 root clock.)

CHANGELOG.md

@@ -2,6 +2,8 @@
 
 ## [Unreleased]
 
+Add FlexIO clock gates for all supported 1000 and 1100 targets.
+
 ## [0.5.2] 2023-04-26
 
 Add LPSPI API to configure the sample point.

src/chip/imxrt10xx/ccm/clock_gate.rs

@@ -298,6 +298,23 @@ where
 #[allow(clippy::assertions_on_constants)]
 const _: () = assert!(ral::SOLE_INSTANCE == 0u8);
 
+/// Returns the FlexIO clock gate locator.
+#[inline(always)]
+pub const fn flexio<const N: u8>() -> Locator
+where
+    ral::flexio::Instance<N>: ral::Valid,
+{
+    [
+        locator(CCGR5, CG1),
+        locator(CCGR3, CG0),
+        locator(CCGR7, CG6),
+    ][if N == ral::SOLE_INSTANCE {
+        N as usize
+    } else {
+        N as usize - 1
+    }]
+}
+
 /// Returns the FlexPWM clock gate locator.
 #[inline(always)]
 pub const fn flexpwm<const N: u8>() -> Locator

src/chip/imxrt11xx/ccm/clock_gate.rs

@@ -188,3 +188,14 @@ where
 pub const fn snvs() -> Locator {
     Locator::new(38)
 }
+
+/// Returns the FlexIO clock gate locator.
+#[inline]
+pub const fn flexio<const N: u8>() -> Locator
+where
+    ral::pwm::Instance<N>: ral::Valid,
+{
+    // FlexIO1 -> LPCG53
+    // FlexIO2 -> LPCG54
+    Locator::new(N as usize + 52)
+}