update Cargo.lock

Signed-off-by: Ouyang, Hang <[email protected]>
intel · Nov 8, 2023 · 2846d5e · 2846d5e
1 parent 72b107b
commit 2846d5e
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Showing 18 changed files with 108 additions and 87 deletions.
diff --git a/Cargo.lock b/Cargo.lock
diff --git a/deps/td-shim b/deps/td-shim
diff --git a/src/attestation/src/ghci.rs b/src/attestation/src/ghci.rs
@@ -6,7 +6,7 @@ use core::sync::atomic::{AtomicU8, Ordering};
 use core::{ffi::c_void, ptr::null_mut, slice::from_raw_parts_mut};
 use td_payload::arch::apic::{disable, enable_and_hlt};
 use td_payload::arch::idt::register;
-use td_payload::{interrupt_handler_template, mm::dma::DmaMemory};
+use td_payload::{interrupt_handler_template, mm::shared::SharedMemory};
 use tdx_tdcall::{td_vmcall, tdx, TdVmcallArgs, TdVmcallError};
 
 use crate::binding::AttestLibError;
@@ -26,7 +26,7 @@ pub extern "C" fn migtd_get_quote(tdquote_req_buf: *mut c_void, len: u64) -> i32
 
     let input = unsafe { from_raw_parts_mut(tdquote_req_buf as *mut u8, len as usize) };
 
-    let mut shared = if let Some(shared) = DmaMemory::new(len as usize / 0x1000) {
+    let mut shared = if let Some(shared) = SharedMemory::new(len as usize / 0x1000) {
         shared
     } else {
         return AttestLibError::MigtdAttestErrorOutOfMemory as i32;

diff --git a/src/devices/virtio/fuzz/fuzz_targets/afl-virtio.rs b/src/devices/virtio/fuzz/fuzz_targets/afl-virtio.rs
@@ -15,7 +15,7 @@ const BARU64_2_OFFSET: u64 = 0x18;
 const BARU64_3_OFFSET: u64 = 0x20;
 
 const VEC_CAPACITY: usize = 0x10000_0000;
-const TD_PAYLOAD_DMA_SIZE: usize = 0x100_0000;
+const TD_PAYLOAD_SHARED_MEMORY_SIZE: usize = 0x100_0000;
 const PTR_ALIGN_VAR: u64 = 0xffff_ffff_ffff_0000;
 
 const DATA_LEN: usize = 0x100_0000;
@@ -28,7 +28,7 @@ fn main() {
 
     let common_addr = 0;
     let paddr = ptr + PAGE_SIZE as u64;
-    init(paddr as usize, TD_PAYLOAD_DMA_SIZE);
+    init(paddr as usize, TD_PAYLOAD_SHARED_MEMORY_SIZE);
     COMMON_HEADER.try_init_once(|| ptr).expect("init error");
 
     #[cfg(not(feature = "fuzz"))]

diff --git a/src/devices/virtio/fuzz/fuzz_targets/fuzz-virtio.rs b/src/devices/virtio/fuzz/fuzz_targets/fuzz-virtio.rs
@@ -17,7 +17,7 @@ fuzz_target!(|data: &[u8]| {
 
     let common_addr = ptr + 0x10c;
     let paddr = ptr + PAGE_SIZE as u64;
-    init(paddr as usize, TD_PAYLOAD_DMA_SIZE);
+    init(paddr as usize, TD_PAYLOAD_SHARED_MEMORY_SIZE);
     // COMMON_HEADER.try_init_once(|| ptr).expect("init error");
     if !COMMON_HEADER.is_initialized() {
         COMMON_HEADER.init_once(|| ptr);

diff --git a/src/devices/virtio/fuzz/fuzz_targets/fuzzlib.rs b/src/devices/virtio/fuzz/fuzz_targets/fuzzlib.rs
@@ -2,9 +2,9 @@
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 
-use crate::fuzzlib::dma_alloc::virtio_dma_alloc;
+use crate::fuzzlib::shared_alloc::virtio_shared_alloc;
 use conquer_once::spin::OnceCell;
-pub use dma_alloc::init;
+pub use shared_alloc::init;
 
 pub use pci::{get_fuzz_seed_address, PciDevice, COMMON_HEADER};
 pub use virtio::{
@@ -21,7 +21,7 @@ pub const BARU64_2_OFFSET: u64 = 0x18;
 pub const BARU64_3_OFFSET: u64 = 0x20;
 
 pub const VEC_CAPACITY: usize = 0x10000_0000;
-pub const TD_PAYLOAD_DMA_SIZE: usize = 0x100_0000;
+pub const TD_PAYLOAD_SHARED_MEMORY_SIZE: usize = 0x100_0000;
 pub const PTR_ALIGN_VAR: u64 = 0xffff_ffff_ffff_0000;
 
 pub const DATA_LEN: usize = 0x100_0000;
@@ -66,12 +66,12 @@ pub fn fuzz_virtio(pddr: u64) {
     }
 }
 
-mod dma_alloc {
+mod shared_alloc {
 
     use bitmap_allocator::{BitAlloc, BitAlloc4K};
     use spin::Mutex;
 
-    static DMA_ALLOCATOR: Mutex<DmaAlloc> = Mutex::new(DmaAlloc::empty());
+    static SHARED_MEMORY_ALLOCATOR: Mutex<SharedAlloc> = Mutex::new(SharedAlloc::empty());
 
     pub fn init(dma_base: usize, dma_size: usize) {
         println!("init dma - {:#x} - {:#x}\n", dma_base, dma_base + dma_size);
@@ -80,18 +80,18 @@ mod dma_alloc {
 
     fn init_dma(dma_base: usize, dma_size: usize) {
         // set page table flags TBD:
-        *DMA_ALLOCATOR.lock() = DmaAlloc::new(dma_base as usize, dma_size);
+        *SHARED_MEMORY_ALLOCATOR.lock() = SharedAlloc::new(dma_base as usize, dma_size);
     }
 
     #[no_mangle]
-    pub extern "C" fn virtio_dma_alloc(blocks: usize) -> PhysAddr {
-        let paddr = unsafe { DMA_ALLOCATOR.lock().alloc_contiguous(blocks, 0) }.unwrap_or(0);
+    pub extern "C" fn virtio_shared_alloc(blocks: usize) -> PhysAddr {
+        let paddr = unsafe { SHARED_MEMORY_ALLOCATOR.lock().alloc_contiguous(blocks, 0) }.unwrap_or(0);
         paddr
     }
 
     #[no_mangle]
-    pub extern "C" fn virtio_dma_dealloc(paddr: PhysAddr, blocks: usize) -> i32 {
-        let _ = unsafe { DMA_ALLOCATOR.lock().dealloc_contiguous(paddr, blocks) };
+    pub extern "C" fn virtio_shared_dealloc(paddr: PhysAddr, blocks: usize) -> i32 {
+        let _ = unsafe { SHARED_MEMORY_ALLOCATOR.lock().dealloc_contiguous(paddr, blocks) };
         0
     }
 
@@ -108,14 +108,14 @@ mod dma_alloc {
     type VirtAddr = usize;
     type PhysAddr = usize;
 
-    struct DmaAlloc {
+    struct SharedAlloc {
         base: usize,
         inner: BitAlloc4K,
     }
 
     const BLOCK_SIZE: usize = 4096;
 
-    impl Default for DmaAlloc {
+    impl Default for SharedAlloc {
         fn default() -> Self {
             Self {
                 base: 0,
@@ -124,13 +124,13 @@ mod dma_alloc {
         }
     }
 
-    impl DmaAlloc {
+    impl SharedAlloc {
         pub fn new(base: usize, length: usize) -> Self {
             let mut inner = BitAlloc4K::DEFAULT;
             let blocks = length / BLOCK_SIZE;
             assert!(blocks <= BitAlloc4K::CAP);
             inner.insert(0..blocks);
-            DmaAlloc { base, inner }
+            SharedAlloc { base, inner }
         }
 
         const fn empty() -> Self {

diff --git a/src/devices/virtio_serial/src/lib.rs b/src/devices/virtio_serial/src/lib.rs
@@ -123,7 +123,7 @@ impl DmaMemoryRegion {
 }
 
 /// Trait to allow separation of transport from block driver
-pub trait DmaPageAllocator {
+pub trait SharedPageAllocator {
     fn alloc_pages(&self, page_num: usize) -> Option<u64>;
     fn free_pages(&self, addr: u64, page_num: usize);
 }
@@ -186,7 +186,7 @@ impl From<u16> for ControlEvent {
 
 pub struct VirtioSerial {
     virtio: Box<dyn VirtioTransport>,
-    dma_allocator: Box<dyn DmaPageAllocator>,
+    shared_allocator: Box<dyn SharedPageAllocator>,
     timer: Box<dyn Timer>,
 
     /// DMA allocation table
@@ -211,12 +211,12 @@ unsafe impl Sync for VirtioSerial {}
 impl VirtioSerial {
     pub fn new(
         virtio: Box<dyn VirtioTransport>,
-        dma_allocator: Box<dyn DmaPageAllocator>,
+        shared_allocator: Box<dyn SharedPageAllocator>,
         timer: Box<dyn Timer>,
     ) -> Result<Self> {
         Ok(Self {
             virtio,
-            dma_allocator,
+            shared_allocator,
             timer,
             queues: Vec::new(),
             receive_queues_prefill: Vec::new(),
@@ -792,7 +792,7 @@ impl VirtioSerial {
 
     fn allocate_dma_memory(&mut self, size: usize) -> Option<DmaMemoryRegion> {
         let dma_size = align_up(size);
-        let dma_addr = self.dma_allocator.alloc_pages(dma_size / PAGE_SIZE)?;
+        let dma_addr = self.shared_allocator.alloc_pages(dma_size / PAGE_SIZE)?;
 
         let record = DmaMemoryRegion::new(dma_addr, dma_size);
         self.dma_allocation.insert(dma_addr, record);
@@ -803,7 +803,7 @@ impl VirtioSerial {
     fn free_dma_memory(&mut self, dma_addr: u64) -> Option<u64> {
         let record = self.dma_allocation.get(&dma_addr)?;
 
-        self.dma_allocator
+        self.shared_allocator
             .free_pages(record.dma_addr, record.dma_size / PAGE_SIZE);
 
         self.dma_allocation.remove(&dma_addr);

diff --git a/src/devices/vsock/fuzz/fuzz_targets/afl-vsock.rs b/src/devices/vsock/fuzz/fuzz_targets/afl-vsock.rs
@@ -4,7 +4,7 @@
 
 mod fuzzlib;
 use conquer_once::spin::OnceCell;
-use fuzzlib::{init, virtio_dma_alloc, virtio_dma_dealloc, COMMON_HEADER};
+use fuzzlib::{init, virtio_shared_alloc, virtio_shared_dealloc, COMMON_HEADER};
 use spin::{once::Once, Mutex};
 use std::thread::spawn;
 use virtio::{virtio_pci::VirtioPciTransport, Result};
@@ -21,7 +21,7 @@ const BARU64_2_OFFSET: u64 = 0x18;
 const BARU64_3_OFFSET: u64 = 0x20;
 
 const VEC_CAPACITY: usize = 0x10000_0000;
-const TD_PAYLOAD_DMA_SIZE: usize = 0x100_0000;
+const TD_PAYLOAD_SHARED_MEMORY_SIZE: usize = 0x100_0000;
 const PTR_ALIGN_VAR: u64 = 0xffff_ffff_ffff_0000;
 
 const DATA_LEN: usize = 0x100_0000;
@@ -62,7 +62,7 @@ struct Allocator;
 
 impl VsockDmaPageAllocator for Allocator {
     fn alloc_pages(&self, page_num: usize) -> Option<u64> {
-        let addr = virtio_dma_alloc(page_num);
+        let addr = virtio_shared_alloc(page_num);
         if addr == 0 {
             None
         } else {
@@ -71,7 +71,7 @@ impl VsockDmaPageAllocator for Allocator {
     }
 
     fn free_pages(&self, addr: u64, page_num: usize) {
-        virtio_dma_dealloc(addr as usize, page_num);
+        virtio_shared_dealloc(addr as usize, page_num);
     }
 }
 
@@ -238,7 +238,7 @@ fn main() {
     data[..DEVICE_HEADER.len()].copy_from_slice(&DEVICE_HEADER);
     COMMON_HEADER.try_init_once(|| ptr).expect("init error");
     let paddr = ptr + PAGE_SIZE as u64;
-    init(paddr as usize, TD_PAYLOAD_DMA_SIZE);
+    init(paddr as usize, TD_PAYLOAD_SHARED_MEMORY_SIZE);
 
     #[cfg(not(feature = "fuzz"))]
     {

diff --git a/src/devices/vsock/fuzz/fuzz_targets/fuzz-vsock.rs b/src/devices/vsock/fuzz/fuzz_targets/fuzz-vsock.rs
@@ -24,7 +24,7 @@ const BARU64_2_OFFSET: u64 = 0x18;
 const BARU64_3_OFFSET: u64 = 0x20;
 
 const VEC_CAPACITY: usize = 0x10000_0000;
-const TD_PAYLOAD_DMA_SIZE: usize = 0x100_0000;
+const TD_PAYLOAD_SHARED_MEMORY_SIZE: usize = 0x100_0000;
 const PTR_ALIGN_VAR: u64 = 0xffff_ffff_ffff_0000;
 
 const DATA_LEN: usize = 0x100_0000;
@@ -231,7 +231,7 @@ fuzz_target!(|data: &[u8]| {
     data[..tmp.len()].copy_from_slice(&tmp);
     let common_addr = ptr + 0x10c;
     let paddr = ptr + PAGE_SIZE as u64;
-    init(paddr as usize, TD_PAYLOAD_DMA_SIZE);
+    init(paddr as usize, TD_PAYLOAD_SHARED_MEMORY_SIZE);
     COMMON_HEADER.try_init_once(|| ptr).expect("init error");
 
     unsafe {