Add log for UT random issues to debug

Signed-off-by: Cheng, Penghui <[email protected]>
intel · Jan 13, 2025 · 4c884ca · 4c884ca
1 parent 04e5a38
commit 4c884ca
Showing 1 changed file with 6 additions and 2 deletions.
diff --git a/test/xpu/test_ops_xpu.py b/test/xpu/test_ops_xpu.py
@@ -1,8 +1,12 @@
 # Owner(s): ["module: intel"]
 
 
-from torch.testing._internal.common_device_type import instantiate_device_type_tests
-from torch.testing._internal.common_utils import run_tests
+import torch
+import torch._prims as prims
+import torch.utils._pytree as pytree
+import warnings
+from torch.testing._internal.common_device_type import instantiate_device_type_tests, onlyXPU, OpDTypes, ops
+from torch.testing._internal.common_utils import run_tests, slowTest, suppress_warnings
 
 try:
     from xpu_test_utils import XPUPatchForImport