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Add new SoC npcx9mfp support for npcx9 series. Signed-off-by: Jun Lin <[email protected]>
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/* | ||
* Copyright (c) 2023 Nuvoton Technology Corporation. | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <mem.h> | ||
#include "npcx/npcx9.dtsi" | ||
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/ { | ||
flash0: flash@10058000 { | ||
reg = <0x10058000 DT_SIZE_K(416)>; | ||
}; | ||
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flash1: flash@64000000 { | ||
reg = <0x64000000 DT_SIZE_K(1024)>; | ||
}; | ||
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sram0: memory@200c0000 { | ||
compatible = "mmio-sram"; | ||
reg = <0x200C0000 DT_SIZE_K(92)>; | ||
}; | ||
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/* RAM space used by Booter */ | ||
bootloader_ram: memory@200d7000 { | ||
compatible = "mmio-sram"; | ||
reg = <0x200D7000 DT_SIZE_K(4)>; | ||
}; | ||
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soc-id { | ||
device-id = <0x2b>; | ||
}; | ||
}; | ||
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&qspi_fiu0 { | ||
int_flash: w25q80@0 { | ||
compatible ="nuvoton,npcx-fiu-nor"; | ||
size = <DT_SIZE_M(1 * 8)>; | ||
reg = <0>; | ||
status = "okay"; | ||
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/* quad spi bus configuration of nor flash device */ | ||
qspi-flags = <NPCX_QSPI_SW_CS1>; | ||
mapped-addr = <0x64000000>; | ||
pinctrl-0 = <&int_flash_sl>; | ||
pinctrl-names = "default"; | ||
}; | ||
}; |
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# Nuvoton Cortex-M4 Embedded Controller | ||
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# Copyright (c) 2023 Nuvoton Technology Corporation. | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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if SOC_NPCX9MFP | ||
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config SOC | ||
default "npcx9mfp" | ||
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endif # SOC_NPCX9MFP |
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@@ -16,4 +16,7 @@ config SOC_NPCX9M6F | |
config SOC_NPCX9M7F | ||
bool "NPCX9M7F" | ||
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config SOC_NPCX9MFP | ||
bool "NPCX9MFP" | ||
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endchoice |