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Improve AOT mode (on RISC-V) w.r.t calls #33

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merged 4 commits into from
Nov 2, 2023
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janvrany
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@janvrany janvrany commented Nov 1, 2023

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…aw bytes

This commit changes the way assembler input is generated in AOT mode.
Instead of writing instruction as raw `.byte`s, write normal assembly.

This means we must not fixup branches in AOT mode in order to keep them
symbolic.

This change not only improves readability by also (will) enable generation
of more advanced AOT code (using PLT for calls, relocatable static data
and so on)
This commit improves support for source / bytecode locations in AOT mode
in two ways:

  * write bytecode indices in generate assembly
  * write location pseudo-instructions / comments only when they change
    (and not for each instruction).

This improves readability of generated assembly source.
...that is, functions whose return type is void.
This commit adds support for calling external (in a sense external to
current compilation) functions in AOT mode.

Since we're deferring object file creation to GNU assembler, we need to
generate `call` pseudo instruction in order for assembler and linker
to create  appropriate relocations and PLT thunks.

To do so, we introduce a new RISC-V specific pseudo instruction:
`AcRISCVCall` which behaves as `auipc` + `jalr` pair when used in JIT
mode.

This hack may be removed once we move away from generating GNU assembler
source towards creating object file directly.
@shingarov
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My comments on this are of mostly-philosophical nature. Let's address them in 2024.

@shingarov shingarov merged commit a20eb55 into master Nov 2, 2023
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@janvrany janvrany deleted the pr/improve-aot branch November 2, 2023 11:50
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2 participants