add configuration option to allow emulating Pentium MSRs but ignore

(rather than fault) RDMSR/WRMSR on undefined registers. Apparently this
allows the 3Dfx GLIDE2.OVL driver to work, since the driver apparently
assumes that Pentium Pro/Pentium II MTRR registers are present despite
the fact that DOSBox *clearly* indicates through CPUID that MTRRs are
not present.

src/cpu/cpu.cpp

@@ -38,6 +38,7 @@ bool CPU_NMI_active = false;
 bool CPU_NMI_pending = false;
 
 bool enable_msr = true;
+bool ignore_undefined_msr = true;
 
 extern bool ignore_opcode_63;
 
@@ -2644,6 +2645,7 @@ class CPU: public Module_base {
 			CPU_CycleAutoAdjust=false;
 		}
 
+		ignore_undefined_msr=section->Get_bool("ignore undefined msr");
 		enable_msr=section->Get_bool("enable msr");
 		CPU_CycleUp=section->Get_int("cycleup");
 		CPU_CycleDown=section->Get_int("cycledown");
@@ -2900,6 +2902,12 @@ bool CPU_RDMSR() {
 			break;
 	}
 
+	if (ignore_undefined_msr) {
+		/* wing it and hope nobody notices */
+		reg_edx = reg_eax = 0;
+		return true;
+	}
+
 	return false; /* unknown reg, signal illegal opcode */
 }
 
@@ -2912,6 +2920,7 @@ bool CPU_WRMSR() {
 			break;
 	}
 
+	if (ignore_undefined_msr) return true; /* ignore */
 	return false; /* unknown reg, signal illegal opcode */
 }
 

src/dosbox.cpp

@@ -1123,6 +1123,13 @@ void DOSBOX_Init(void) {
 	Pbool = secprop->Add_bool("enable msr",Property::Changeable::Always,true);
 	Pbool->Set_help("Allow RDMSR/WRMSR instructions. This option is only meaningful when cputype=pentium.");
 
+	Pbool = secprop->Add_bool("ignore undefined msr",Property::Changeable::Always,false);
+	Pbool->Set_help("Ignore RDMSR/WRMSR on undefined registers. Normally the CPU will fire an Invalid Opcode exception in that case.\n"
+			"This option is off by default, enable if using software or drivers that assumes the presence of\n"
+			"certain MSR registers without checking. If you are using certain versions of the 3Dfx glide drivers for MS-DOS\n"
+			"you will need to set this to TRUE as 3Dfx appears to have coded GLIDE2.OVL to assume the presence\n"
+			"of Pentium Pro/Pentium II MTRR registers.");
+
 	Pint = secprop->Add_int("dynamic core cache block size",Property::Changeable::Always,32);
 	Pint->SetMinMax(1,65536);
 	Pint->Set_help("dynamic core cache block size. default value is 32. change this value carefully.\n"