GitHub - jtmiraglia/carry_select_adder: a 16 bit carry select adder built from scratch using only primitive gates

jtmiraglia / carry_select_adder Public

a 16 bit carry select adder built from scratch using only primitive gates

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Name		Name	Last commit message	Last commit date
Latest commit History 2 Commits
add_tb.v		add_tb.v
add_tb.v.bak		add_tb.v.bak
carry_select_4bit.v		carry_select_4bit.v
carry_select_4bit.v.bak		carry_select_4bit.v.bak
carry_select_4bit_tb.v		carry_select_4bit_tb.v
carry_select_4bit_tb.v.bak		carry_select_4bit_tb.v.bak
carry_select_adder.qsf		carry_select_adder.qsf
carry_select_adder.v		carry_select_adder.v
carry_select_adder.v.bak		carry_select_adder.v.bak
carry_select_adder_description.txt		carry_select_adder_description.txt
carry_select_adder_nativelink_simulation.rpt		carry_select_adder_nativelink_simulation.rpt
full_adder.v		full_adder.v
full_adder.v.bak		full_adder.v.bak
multiplexor.v		multiplexor.v
multiplexor.v.bak		multiplexor.v.bak
mux_tb.v		mux_tb.v
mux_tb.v.bak		mux_tb.v.bak
ripple_4bit.v		ripple_4bit.v
ripple_4bit.v.bak		ripple_4bit.v.bak
ripple_4bit_tb.v		ripple_4bit_tb.v
ripple_4bit_tb.v.bak		ripple_4bit_tb.v.bak
ripple_carry_adder.v		ripple_carry_adder.v
ripple_carry_adder.v.bak		ripple_carry_adder.v.bak
test_bench.v		test_bench.v
test_bench.v.bak		test_bench.v.bak