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1. QModels-Brevitas-Example QModels-Brevitas-Example Public

   Quantized Neural Network Models and source codes trained by Brevitas

   Jupyter Notebook 2

2. AXI-GPIO-Ultra96V2 AXI-GPIO-Ultra96V2 Public

   Simple Project for Beginners of Ultra96 V2: Implement a simple Verilog project to load two 32-bits integers from PS to PL and transmit their sum back based on AXI-GPIO

   C 1

3. AXI-MultiDMA-Ultra96V2 AXI-MultiDMA-Ultra96V2 Public

   Simple Project for Beginners of Ultra96 V2: Implement a simple Verilog project to transmit an 32-bits integer array from PS to PL in four DMAs. PL computes the sum of received data and transmits th…

   VHDL

4. AXI-SimpleDMA-Ultra96V2 AXI-SimpleDMA-Ultra96V2 Public

   Simple Project for Beginners of Ultra96 V2: Implement a simple Verilog project to transmit an 32-bits integer array from PS to PL. PL computes the sum of received data and transmits the result back…

   VHDL