Dont modify existing PreRARematStage LiveIn handling

Change-Id: I96c99f12c59ef0eea86f7fbf134913ecc47dd6f2
llvm · Aug 12, 2024 · 415e531 · 415e531
1 parent 0e70bac
commit 415e531
Showing 1 changed file with 3 additions and 2 deletions.
diff --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -1669,6 +1669,9 @@ bool PreRARematStage::sinkTriviallyRematInsts(const GCNSubtarget &ST,
     MachineInstr *MI = Entry.first;
     MachineInstr *OldMI = Entry.second;
 
+    // Remove OldMI from BBLiveInMap since we are sinking it from its MBB.
+    DAG.BBLiveInMap.erase(OldMI);
+
     // Remove OldMI and update LIS
     Register Reg = MI->getOperand(0).getReg();
     LIS->RemoveMachineInstrFromMaps(*OldMI);
@@ -1686,8 +1689,6 @@ bool PreRARematStage::sinkTriviallyRematInsts(const GCNSubtarget &ST,
   DAG.Regions = NewRegions;
   DAG.RescheduleRegions = NewRescheduleRegions;
 
-  DAG.BBLiveInMap = DAG.getBBLiveInMap();
-
   if (GCNTrackers)
     DAG.RegionLiveOuts.buildLiveRegMap();