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Merge branch 'main' into dev/NormalizeMemref
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DarshanRamakant authored Sep 28, 2024
2 parents b03d3fe + 2a005bf commit fbe266c
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9 changes: 5 additions & 4 deletions bolt/include/bolt/Core/BinaryContext.h
Original file line number Diff line number Diff line change
Expand Up @@ -71,14 +71,15 @@ struct SegmentInfo {
uint64_t FileOffset; /// Offset in the file.
uint64_t FileSize; /// Size in file.
uint64_t Alignment; /// Alignment of the segment.
bool IsExecutable; /// Is the executable bit set on the Segment?

void print(raw_ostream &OS) const {
OS << "SegmentInfo { Address: 0x"
<< Twine::utohexstr(Address) << ", Size: 0x"
<< Twine::utohexstr(Size) << ", FileOffset: 0x"
OS << "SegmentInfo { Address: 0x" << Twine::utohexstr(Address)
<< ", Size: 0x" << Twine::utohexstr(Size) << ", FileOffset: 0x"
<< Twine::utohexstr(FileOffset) << ", FileSize: 0x"
<< Twine::utohexstr(FileSize) << ", Alignment: 0x"
<< Twine::utohexstr(Alignment) << "}";
<< Twine::utohexstr(Alignment) << ", " << (IsExecutable ? "x" : " ")
<< "}";
};
};

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1 change: 0 additions & 1 deletion bolt/include/bolt/Core/BinaryData.h
Original file line number Diff line number Diff line change
Expand Up @@ -226,7 +226,6 @@ inline raw_ostream &operator<<(raw_ostream &OS,
Sep = ",\n ";
TotalCount += AccessInfo.Count;
}
SS.flush();

OS << TotalCount << " total counts : " << TempString;
return OS;
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1 change: 0 additions & 1 deletion bolt/include/bolt/Core/BinaryFunction.h
Original file line number Diff line number Diff line change
Expand Up @@ -117,7 +117,6 @@ inline raw_ostream &operator<<(raw_ostream &OS,
TotalCount += CSP.Count;
TotalMispreds += CSP.Mispreds;
}
SS.flush();

OS << TotalCount << " (" << TotalMispreds << " misses) :" << TempString;
return OS;
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11 changes: 5 additions & 6 deletions bolt/include/bolt/Rewrite/RewriteInstance.h
Original file line number Diff line number Diff line change
Expand Up @@ -510,12 +510,11 @@ class RewriteInstance {
};

/// Different types of X86-64 PLT sections.
const PLTSectionInfo X86_64_PLTSections[4] = {
{ ".plt", 16 },
{ ".plt.got", 8 },
{ ".plt.sec", 8 },
{ nullptr, 0 }
};
const PLTSectionInfo X86_64_PLTSections[5] = {{".plt", 16},
{".plt.got", 8},
{".plt.sec", 8},
{".iplt", 16},
{nullptr, 0}};

/// AArch64 PLT sections.
const PLTSectionInfo AArch64_PLTSections[4] = {
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3 changes: 3 additions & 0 deletions bolt/lib/Core/BinaryContext.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2021,6 +2021,9 @@ BinaryContext::getBaseAddressForMapping(uint64_t MMapAddress,
// Find a segment with a matching file offset.
for (auto &KV : SegmentMapInfo) {
const SegmentInfo &SegInfo = KV.second;
// Only consider executable segments.
if (!SegInfo.IsExecutable)
continue;
// FileOffset is got from perf event,
// and it is equal to alignDown(SegInfo.FileOffset, pagesize).
// If the pagesize is not equal to SegInfo.Alignment.
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6 changes: 6 additions & 0 deletions bolt/lib/Core/BinaryFunction.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -165,6 +165,12 @@ bool shouldPrint(const BinaryFunction &Function) {
}
}

std::optional<StringRef> Origin = Function.getOriginSectionName();
if (Origin && llvm::any_of(opts::PrintOnly, [&](const std::string &Name) {
return Name == *Origin;
}))
return true;

return false;
}

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2 changes: 0 additions & 2 deletions bolt/lib/Passes/RetpolineInsertion.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -181,7 +181,6 @@ std::string createRetpolineFunctionTag(BinaryContext &BC,
if (BrInfo.isReg()) {
BC.InstPrinter->printRegName(TagOS, BrInfo.BranchReg);
TagOS << "_";
TagOS.flush();
return Tag;
}

Expand Down Expand Up @@ -212,7 +211,6 @@ std::string createRetpolineFunctionTag(BinaryContext &BC,
BC.InstPrinter->printRegName(TagOS, MemRef.SegRegNum);
}

TagOS.flush();
return Tag;
}

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3 changes: 2 additions & 1 deletion bolt/lib/Profile/DataAggregator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2043,7 +2043,8 @@ std::error_code DataAggregator::parseMMapEvents() {
// size of the mapping, but we know it should not exceed the segment
// alignment value. Hence we are performing an approximate check.
return SegInfo.Address >= MMapInfo.MMapAddress &&
SegInfo.Address - MMapInfo.MMapAddress < SegInfo.Alignment;
SegInfo.Address - MMapInfo.MMapAddress < SegInfo.Alignment &&
SegInfo.IsExecutable;
});
if (!MatchFound) {
errs() << "PERF2BOLT-WARNING: ignoring mapping of " << NameToUse
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12 changes: 4 additions & 8 deletions bolt/lib/Rewrite/RewriteInstance.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -526,11 +526,9 @@ Error RewriteInstance::discoverStorage() {
NextAvailableOffset = std::max(NextAvailableOffset,
Phdr.p_offset + Phdr.p_filesz);

BC->SegmentMapInfo[Phdr.p_vaddr] = SegmentInfo{Phdr.p_vaddr,
Phdr.p_memsz,
Phdr.p_offset,
Phdr.p_filesz,
Phdr.p_align};
BC->SegmentMapInfo[Phdr.p_vaddr] = SegmentInfo{
Phdr.p_vaddr, Phdr.p_memsz, Phdr.p_offset,
Phdr.p_filesz, Phdr.p_align, ((Phdr.p_flags & ELF::PF_X) != 0)};
if (BC->TheTriple->getArch() == llvm::Triple::x86_64 &&
Phdr.p_vaddr >= BinaryContext::KernelStartX86_64)
BC->IsLinuxKernel = true;
Expand Down Expand Up @@ -1533,7 +1531,7 @@ void RewriteInstance::createPLTBinaryFunction(uint64_t TargetAddress,

MCSymbol *Symbol = Rel->Symbol;
if (!Symbol) {
if (!BC->isAArch64() || !Rel->Addend || !Rel->isIRelative())
if (BC->isRISCV() || !Rel->Addend || !Rel->isIRelative())
return;

// IFUNC trampoline without symbol
Expand Down Expand Up @@ -4247,7 +4245,6 @@ void RewriteInstance::addBoltInfoSection() {
<< "command line:";
for (int I = 0; I < Argc; ++I)
DescOS << " " << Argv[I];
DescOS.flush();

// Encode as GNU GOLD VERSION so it is easily printable by 'readelf -n'
const std::string BoltInfo =
Expand All @@ -4270,7 +4267,6 @@ void RewriteInstance::encodeBATSection() {
raw_string_ostream DescOS(DescStr);

BAT->write(*BC, DescOS);
DescOS.flush();

const std::string BoltInfo =
BinarySection::encodeELFNote("BOLT", DescStr, BinarySection::NT_BOLT_BAT);
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1 change: 0 additions & 1 deletion bolt/lib/RuntimeLibs/InstrumentationRuntimeLibrary.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -314,7 +314,6 @@ std::string InstrumentationRuntimeLibrary::buildTables(BinaryContext &BC) {
}
// Our string table lives immediately after descriptions vector
OS << Summary->StringTable;
OS.flush();

return TablesStr;
}
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6 changes: 3 additions & 3 deletions bolt/test/AArch64/constant_island_pie_update.s
Original file line number Diff line number Diff line change
Expand Up @@ -8,15 +8,15 @@
# RUN: %clang %cflags -fPIC -pie %t.o -o %t.rela.exe -nostdlib \
# RUN: -Wl,-q -Wl,-z,notext
# RUN: llvm-bolt %t.rela.exe -o %t.rela.bolt --use-old-text=0 --lite=0
# RUN: llvm-objdump -j .text -d --show-all-symbols %t.rela.bolt | FileCheck %s
# RUN: llvm-objdump -j .text -d -z --show-all-symbols %t.rela.bolt | FileCheck %s
# RUN: llvm-readelf -rsW %t.rela.bolt | FileCheck --check-prefix=ELFCHECK %s
// .relr.dyn
# RUN: %clang %cflags -fPIC -pie %t.o -o %t.relr.exe -nostdlib \
# RUN: -Wl,-q -Wl,-z,notext -Wl,--pack-dyn-relocs=relr
# RUN: llvm-objcopy --remove-section .rela.mytext %t.relr.exe
# RUN: llvm-bolt %t.relr.exe -o %t.relr.bolt --use-old-text=0 --lite=0
# RUN: llvm-objdump -j .text -d --show-all-symbols %t.relr.bolt | FileCheck %s
# RUN: llvm-objdump -j .text -d %t.relr.bolt | \
# RUN: llvm-objdump -j .text -d -z --show-all-symbols %t.relr.bolt | FileCheck %s
# RUN: llvm-objdump -j .text -d -z %t.relr.bolt | \
# RUN: FileCheck %s --check-prefix=ADDENDCHECK
# RUN: llvm-readelf -rsW %t.relr.bolt | FileCheck --check-prefix=RELRELFCHECK %s
# RUN: llvm-readelf -SW %t.relr.bolt | FileCheck --check-prefix=RELRSZCHECK %s
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23 changes: 5 additions & 18 deletions bolt/test/AArch64/ifunc.c → bolt/test/AArch64/ifunc.test
Original file line number Diff line number Diff line change
@@ -1,8 +1,6 @@
// This test checks that IFUNC trampoline is properly recognised by BOLT

// With -O0 indirect call is performed on IPLT trampoline. IPLT trampoline
// has IFUNC symbol.
// RUN: %clang %cflags -nostdlib -O0 -no-pie %s -fuse-ld=lld \
// RUN: %clang %cflags -nostdlib -O0 -no-pie %p/../Inputs/ifunc.c -fuse-ld=lld \
// RUN: -o %t.O0.exe -Wl,-q
// RUN: llvm-bolt %t.O0.exe -o %t.O0.bolt.exe \
// RUN: --print-disasm --print-only=_start | \
Expand All @@ -12,7 +10,7 @@

// Non-pie static executable doesn't generate PT_DYNAMIC, check relocation
// is readed successfully and IPLT trampoline has been identified by bolt.
// RUN: %clang %cflags -nostdlib -O3 %s -fuse-ld=lld -no-pie \
// RUN: %clang %cflags -nostdlib -O3 %p/../Inputs/ifunc.c -fuse-ld=lld -no-pie \
// RUN: -o %t.O3_nopie.exe -Wl,-q
// RUN: llvm-readelf -l %t.O3_nopie.exe | \
// RUN: FileCheck --check-prefix=NON_DYN_CHECK %s
Expand All @@ -25,7 +23,7 @@
// With -O3 direct call is performed on IPLT trampoline. IPLT trampoline
// doesn't have associated symbol. The ifunc symbol has the same address as
// IFUNC resolver function.
// RUN: %clang %cflags -nostdlib -O3 %s -fuse-ld=lld -fPIC -pie \
// RUN: %clang %cflags -nostdlib -O3 %p/../Inputs/ifunc.c -fuse-ld=lld -fPIC -pie \
// RUN: -o %t.O3_pie.exe -Wl,-q
// RUN: llvm-bolt %t.O3_pie.exe -o %t.O3_pie.bolt.exe \
// RUN: --print-disasm --print-only=_start | \
Expand All @@ -35,8 +33,8 @@

// Check that IPLT trampoline located in .plt section are normally handled by
// BOLT. The gnu-ld linker doesn't use separate .iplt section.
// RUN: %clang %cflags -nostdlib -O3 %s -fuse-ld=lld -fPIC -pie \
// RUN: -T %p/Inputs/iplt.ld -o %t.iplt_O3_pie.exe -Wl,-q
// RUN: %clang %cflags -nostdlib -O3 %p/../Inputs/ifunc.c -fuse-ld=lld -fPIC -pie \
// RUN: -T %p/../Inputs/iplt.ld -o %t.iplt_O3_pie.exe -Wl,-q
// RUN: llvm-bolt %t.iplt_O3_pie.exe -o %t.iplt_O3_pie.bolt.exe \
// RUN: --print-disasm --print-only=_start | \
// RUN: FileCheck --check-prefix=CHECK %s
Expand All @@ -49,14 +47,3 @@

// REL_CHECK: R_AARCH64_IRELATIVE [[#%x,REL_SYMB_ADDR:]]
// REL_CHECK: [[#REL_SYMB_ADDR]] {{.*}} FUNC {{.*}} resolver_foo

static void foo() {}
static void bar() {}

extern int use_foo;

static void *resolver_foo(void) { return use_foo ? foo : bar; }

__attribute__((ifunc("resolver_foo"))) void ifoo();

void _start() { ifoo(); }
2 changes: 1 addition & 1 deletion bolt/test/AArch64/update-weak-reference-symbol.s
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
// RUN: %clang %cflags -Wl,-z,notext -shared -Wl,-q %s -o %t.so
// RUN: llvm-bolt %t.so -o %t.so.bolt
// RUN: llvm-nm -n %t.so.bolt > %t.out.txt
// RUN: llvm-objdump -dj .rodata %t.so.bolt >> %t.out.txt
// RUN: llvm-objdump -z -dj .rodata %t.so.bolt >> %t.out.txt
// RUN: FileCheck %s --input-file=%t.out.txt

# CHECK: w func_1
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12 changes: 12 additions & 0 deletions bolt/test/Inputs/ifunc.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,12 @@
// This test checks that IFUNC trampoline is properly recognised by BOLT

static void foo() {}
static void bar() {}

extern int use_foo;

static void *resolver_foo(void) { return use_foo ? foo : bar; }

__attribute__((ifunc("resolver_foo"))) void ifoo();

void _start() { ifoo(); }
File renamed without changes.
47 changes: 47 additions & 0 deletions bolt/test/X86/ifunc.test
Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@
// Check if BOLT can process ifunc symbols from .plt section
// RUN: %clang %cflags -nostdlib -no-pie %p/../Inputs/ifunc.c -fuse-ld=lld \
// RUN: -o %t.exe -Wl,-q
// RUN: llvm-bolt %t.exe -o %t.bolt.exe \
// RUN: --print-disasm --print-only=_start | \
// RUN: FileCheck --check-prefix=CHECK %s
// RUN: llvm-readelf -aW %t.bolt.exe | \
// RUN: FileCheck --check-prefix=REL_CHECK %s

// Check if BOLT can process ifunc symbols from .plt section in non-pie static
// executable case.
// RUN: %clang %cflags -nostdlib %p/../Inputs/ifunc.c -fuse-ld=lld -no-pie \
// RUN: -o %t.nopie.exe -Wl,-q
// RUN: llvm-readelf -l %t.nopie.exe | \
// RUN: FileCheck --check-prefix=NON_DYN_CHECK %s
// RUN: llvm-bolt %t.nopie.exe -o %t.nopie.bolt.exe \
// RUN: --print-disasm --print-only=_start | \
// RUN: FileCheck --check-prefix=CHECK %s
// RUN: llvm-readelf -aW %t.nopie.bolt.exe | \
// RUN: FileCheck --check-prefix=REL_CHECK %s

// Check if BOLT can process ifunc symbols from .plt section in pie executable
// case.
// RUN: %clang %cflags -nostdlib %p/../Inputs/ifunc.c -fuse-ld=lld -fPIC -pie \
// RUN: -o %t.pie.exe -Wl,-q
// RUN: llvm-bolt %t.pie.exe -o %t.pie.bolt.exe \
// RUN: --print-disasm --print-only=_start | \
// RUN: FileCheck --check-prefix=CHECK %s
// RUN: llvm-readelf -aW %t.pie.bolt.exe | \
// RUN: FileCheck --check-prefix=REL_CHECK %s

// Check that IPLT trampoline located in .plt section are normally handled by
// BOLT. The gnu-ld linker doesn't use separate .iplt section.
// RUN: %clang %cflags -nostdlib %p/../Inputs/ifunc.c -fuse-ld=lld -fPIC -pie \
// RUN: -T %p/../Inputs/iplt.ld -o %t.iplt_pie.exe -Wl,-q
// RUN: llvm-bolt %t.iplt_pie.exe -o %t.iplt_pie.bolt.exe \
// RUN: --print-disasm --print-only=_start | \
// RUN: FileCheck --check-prefix=CHECK %s
// RUN: llvm-readelf -aW %t.iplt_pie.bolt.exe | \
// RUN: FileCheck --check-prefix=REL_CHECK %s

// NON_DYN_CHECK-NOT: DYNAMIC

// CHECK: callq "resolver_foo/1@PLT"

// REL_CHECK: R_X86_64_IRELATIVE [[#%x,REL_SYMB_ADDR:]]
// REL_CHECK: [[#REL_SYMB_ADDR]] {{.*}} FUNC {{.*}} resolver_foo
4 changes: 2 additions & 2 deletions bolt/test/X86/log.test
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ RUN: yaml2obj %p/Inputs/blarge.yaml &> %t.exe
RUN: llvm-bolt %t.exe -o %t.null --data %p/Inputs/blarge.fdata -v=2 \
RUN: --reorder-blocks=normal --print-finalized --log-file=%t.log 2>&1 \
RUN: | FileCheck --check-prefix=CHECK --allow-empty %s
RUN: cat %t.log | FileCheck %s --check-prefix=CHECK-LOG
RUN: FileCheck %s --check-prefix=CHECK-LOG --input-file %t.log

CHECK-NOT: BOLT-INFO
CHECK-NOT: BOLT-WARNING
Expand All @@ -16,4 +16,4 @@ CHECK-NOT: BOLT-ERROR
CHECK-LOG: BOLT-INFO: Target architecture
CHECK-LOG: BOLT-INFO: BOLT version
CHECK-LOG: BOLT-INFO: basic block reordering modified layout
CHECK-LOG: Binary Function "usqrt"
CHECK-LOG: Binary Function "main"
29 changes: 29 additions & 0 deletions bolt/test/X86/print-only-section.s
Original file line number Diff line number Diff line change
@@ -0,0 +1,29 @@
## Check that --print-only flag works with sections.

# REQUIRES: system-linux

# RUN: llvm-mc -filetype=obj -triple x86_64-unknown-linux %s -o %t.o
# RUN: ld.lld %t.o -o %t.exe
# RUN: llvm-bolt %t.exe -o %t.out --print-cfg --print-only=unused_code 2>&1 \
# RUN: | FileCheck %s

# CHECK: Binary Function "foo"
# CHECK-NOT: Binary Function "_start"

.text
.globl _start
.type _start, %function
_start:
.cfi_startproc
ret
.cfi_endproc
.size _start, .-_start

.section unused_code,"ax",@progbits
.globl foo
.type foo, %function
foo:
.cfi_startproc
ret
.cfi_endproc
.size foo, .-foo
45 changes: 45 additions & 0 deletions bolt/test/merge-fdata-uninitialized-header.test
Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
## Test that merge-fdata correctly handles YAML header with an uninitialized
## fields. a.yaml does not have hash-func set and it used to crash merge-fdata.

# REQUIRES: system-linux

# RUN: split-file %s %t
# RUN: not merge-fdata %t/a.yaml %t/b.yaml 2>&1 | FileCheck %s

# CHECK: cannot merge profiles with different hash functions

#--- a.yaml
---
header:
profile-version: 1
binary-name: 'a.out'
binary-build-id: '<unknown>'
profile-flags: [ lbr ]
profile-origin: branch profile reader
profile-events: ''
dfs-order: false
functions:
- name: 'main'
fid: 1
hash: 0x50BBA3441D436491
exec: 1
nblocks: 0
...
#--- b.yaml
---
header:
profile-version: 1
binary-name: 'a.out'
binary-build-id: '<unknown>'
profile-flags: [ lbr ]
profile-origin: branch profile reader
profile-events: ''
dfs-order: false
hash-func: xxh3
functions:
- name: 'main'
fid: 1
hash: 0x50BBA3441D436491
exec: 1
nblocks: 0
...
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