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[AMDGPU] Merge the conditions used for deciding CS spills for amdgpu_cs_chain[_preserve] #109911

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Sep 26, 2024
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18 changes: 4 additions & 14 deletions llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1342,20 +1342,10 @@ void SIFrameLowering::processFunctionBeforeFrameFinalized(
SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();

// Allocate spill slots for WWM reserved VGPRs.
// For chain functions, we only need to do this if we have calls to
// llvm.amdgcn.cs.chain (otherwise there's no one to save them for, since
// chain functions do not return) and the function did not contain a call to
// llvm.amdgcn.init.whole.wave (since in that case there are no inactive lanes
// when entering the function).
bool IsChainWithoutRestores =
FuncInfo->isChainFunction() &&
(!MF.getFrameInfo().hasTailCall() || FuncInfo->hasInitWholeWave());
if (!FuncInfo->isEntryFunction() && !IsChainWithoutRestores) {
for (Register Reg : FuncInfo->getWWMReservedRegs()) {
const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg);
FuncInfo->allocateWWMSpill(MF, Reg, TRI->getSpillSize(*RC),
TRI->getSpillAlign(*RC));
}
for (Register Reg : FuncInfo->getWWMReservedRegs()) {
const TargetRegisterClass *RC = TRI->getPhysRegBaseClass(Reg);
FuncInfo->allocateWWMSpill(MF, Reg, TRI->getSpillSize(*RC),
TRI->getSpillAlign(*RC));
}

const bool SpillVGPRToAGPR = ST.hasMAIInsts() && FuncInfo->hasSpilledVGPRs()
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10 changes: 8 additions & 2 deletions llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -287,8 +287,14 @@ void SIMachineFunctionInfo::allocateWWMSpill(MachineFunction &MF, Register VGPR,
// amdgpu_cs_chain_preserve calling convention and this is a scratch register.
// We never need to allocate a spill for these because we don't even need to
// restore the inactive lanes for them (they're scratchier than the usual
// scratch registers).
if (isChainFunction() && SIRegisterInfo::isChainScratchRegister(VGPR))
// scratch registers). We only need to do this if we have calls to
// llvm.amdgcn.cs.chain (otherwise there's no one to save them for, since
// chain functions do not return) and the function did not contain a call to
// llvm.amdgcn.init.whole.wave (since in that case there are no inactive lanes
// when entering the function).
if (isChainFunction() &&
(SIRegisterInfo::isChainScratchRegister(VGPR) ||
!MF.getFrameInfo().hasTailCall() || hasInitWholeWave()))
return;

WWMSpills.insert(std::make_pair(
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