Commits on Oct 8, 2024

1. [RISCV] Account for factor in interleave memory op costs …

   Currently we cost an interleaved memory op as if it were a load/store of the widened vector type.
   
   However this doesn't take into account that we'll most likely need to perform at least Factor uops because we're writing/reading from Factor number of registers.
   
   E.g. Today an i8 VF=2 Factor=8 interleave is costed as a single LMUL=1 op with +zvl128b, because the widened type is <16 x i8>.
   
   This changes it to be calculated as <2 x i8> * Factor=8, i.e. 8 LMUL=1 ops.
   
   Thankfully the FIXME about illegal vectors seems to have been fixed in llvm#100436, and even then I think the LT.first should have been multiplied, not added.
   
   Note we still have a quirk where the loop vectorizer will happily emit interleaved accesses for what could be strided accesses, because the costs are break-even in LoopVectorizationCostModel::setCostBasedWideningDecision:
   
   	void f(int8_t* a, int n) {
   	    for (int i = 0; i < n; i++) {
   	        a[i * 2] += 1;
   	    }
   	}
   
   	vsetvli	t1, zero, e8, m2, ta, ma
   	vlseg2e8.v	v24, (t0)
   	vadd.vi	v24, v24, 1
   	vsse8.v	v24, (a6), a5
   
   I think we may need to either adjust the cost or add a hook to get the loop vectorizer to s

   

   lukel97 committed Oct 8, 2024
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