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Fix flag casing and add more checks
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zeux committed Jan 9, 2025
1 parent d9decbe commit 341fd55
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Showing 4 changed files with 10 additions and 2 deletions.
2 changes: 2 additions & 0 deletions CodeGen/src/IrLoweringA64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@

LUAU_FASTFLAG(LuauVectorLibNativeDot)
LUAU_FASTFLAG(LuauCodeGenVectorDeadStoreElim)
LUAU_FASTFLAG(LuauCodeGenLerp)

namespace Luau
{
Expand Down Expand Up @@ -705,6 +706,7 @@ void IrLoweringA64::lowerInst(IrInst& inst, uint32_t index, const IrBlock& next)
}
case IrCmd::SELECT_NUM:
{
LUAU_ASSERT(FFlag::LuauCodeGenLerp);
inst.regA64 = regs.allocReuse(KindA64::d, index, {inst.a, inst.b});

RegisterA64 temp1 = tempDouble(inst.a);
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2 changes: 2 additions & 0 deletions CodeGen/src/IrLoweringX64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@

LUAU_FASTFLAG(LuauVectorLibNativeDot)
LUAU_FASTFLAG(LuauCodeGenVectorDeadStoreElim)
LUAU_FASTFLAG(LuauCodeGenLerp)

namespace Luau
{
Expand Down Expand Up @@ -624,6 +625,7 @@ void IrLoweringX64::lowerInst(IrInst& inst, uint32_t index, const IrBlock& next)
}
case IrCmd::SELECT_NUM:
{
LUAU_ASSERT(FFlag::LuauCodeGenLerp);
inst.regX64 = regs.allocRegOrReuse(SizeX64::xmmword, index, {inst.a}); // can't reuse b if a is a memory operand

ScopedRegX64 tmp{regs, SizeX64::xmmword};
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6 changes: 4 additions & 2 deletions CodeGen/src/IrTranslateBuiltins.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ static const int kBit32BinaryOpUnrolledParams = 5;

LUAU_FASTFLAGVARIABLE(LuauVectorLibNativeCodegen);
LUAU_FASTFLAGVARIABLE(LuauVectorLibNativeDot);
LUAU_FASTFLAGVARIABLE(LuauCodegenLerp);
LUAU_FASTFLAGVARIABLE(LuauCodeGenLerp);

namespace Luau
{
Expand Down Expand Up @@ -297,6 +297,8 @@ static BuiltinImplResult translateBuiltinMathLerp(
int pcpos
)
{
LUAU_ASSERT(FFlag::LuauCodeGenLerp);

if (nparams < 3 || nresults > 1)
return {BuiltinImplType::None, -1};

Expand Down Expand Up @@ -1423,7 +1425,7 @@ BuiltinImplResult translateBuiltin(
return FFlag::LuauVectorLibNativeCodegen ? translateBuiltinVectorMap2(build, IrCmd::MAX_NUM, nparams, ra, arg, args, arg3, nresults, pcpos)
: noneResult;
case LBF_MATH_LERP:
return FFlag::LuauCodegenLerp ? translateBuiltinMathLerp(build, nparams, ra, arg, args, arg3, nresults, fallback, pcpos) : noneResult;
return FFlag::LuauCodeGenLerp ? translateBuiltinMathLerp(build, nparams, ra, arg, args, arg3, nresults, fallback, pcpos) : noneResult;
default:
return {BuiltinImplType::None, -1};
}
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2 changes: 2 additions & 0 deletions CodeGen/src/IrUtils.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#include <math.h>

LUAU_FASTFLAG(LuauVectorLibNativeDot);
LUAU_FASTFLAG(LuauCodeGenLerp);

namespace Luau
{
Expand Down Expand Up @@ -658,6 +659,7 @@ void foldConstants(IrBuilder& build, IrFunction& function, IrBlock& block, uint3
}
break;
case IrCmd::SELECT_NUM:
LUAU_ASSERT(FFlag::LuauCodeGenLerp);
if (inst.c.kind == IrOpKind::Constant && inst.d.kind == IrOpKind::Constant)
{
double c = function.doubleOp(inst.c);
Expand Down

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