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[RISCV] Support CoreV SIMD builtins in clang (plctlab#32)
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Co-authored-by: melonedo <[email protected]>
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melonedo and melonedo authored Apr 21, 2023
1 parent a61324d commit 6fc71d4
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162 changes: 162 additions & 0 deletions clang/include/clang/Basic/BuiltinsRISCVCOREV.def
Original file line number Diff line number Diff line change
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//==- BuiltinsRISCVCOREV.def - RISC-V CORE-V Builtin database ----*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the CORE-V-specific builtin function database. Users of
// this file must define the BUILTIN macro to make use of this information.
//
//===----------------------------------------------------------------------===//

#if defined(BUILTIN) && !defined(TARGET_BUILTIN)
# define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) BUILTIN(ID, TYPE, ATTRS)
#endif

TARGET_BUILTIN(simd_add_h, "UZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_add_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_add_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_add_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sub_h, "UZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sub_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sub_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sub_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avg_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avg_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avg_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avg_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_avgu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_min_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_minu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_max_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_maxu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_srl_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sra_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sll_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_or_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_or_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_or_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_or_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_xor_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_xor_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_xor_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_xor_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_and_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_and_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_and_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_and_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_abs_h, "UZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_abs_b, "UZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotup_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotup_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotup_sc_h, "UZiUZiUs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotup_sc_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_h, "ZiUZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_b, "ZiUZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_sc_h, "ZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotusp_sc_b, "ZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_h, "ZiSZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_b, "ZiSZiSZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_sc_h, "ZiSZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_dotsp_sc_b, "ZiSZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_h, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_b, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_sc_h, "UZiUZiUsUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotup_sc_b, "UZiUZiUcUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_h, "ZiUZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_b, "ZiUZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_sc_h, "ZiUZiSsZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotusp_sc_b, "ZiUZiScZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_h, "ZiSZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_b, "ZiSZiSZiZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_sc_h, "ZiSZiSsZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_sdotsp_sc_b, "ZiSZiScZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_extract_h, "ZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_extract_b, "ZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_extractu_h, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_extractu_b, "UZiUZiUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_insert_h, "UZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_insert_b, "UZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_sci_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle_sci_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle2_h, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_shuffle2_b, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_pack, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_pack_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_packhi_b, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_packlo_b, "UZiUZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpeq_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpeq_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpeq_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpeq_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpne_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpne_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpne_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpne_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgt_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgt_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgt_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgt_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpge_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpge_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpge_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpge_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmplt_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmplt_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmplt_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmplt_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmple_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmple_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmple_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmple_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgtu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpgeu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpltu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_h, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_b, "UZiUZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_sc_h, "UZiUZiSs", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cmpleu_sc_b, "UZiUZiSc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cplxmul_r, "UZiUZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cplxmul_i, "UZiUZiUZiUZiIUc", "nc", "xcvsimd")
TARGET_BUILTIN(simd_cplxconj, "UZiUZi", "nc", "xcvsimd")
TARGET_BUILTIN(simd_subrotmj, "UZiUZiUZiIUc", "nc", "xcvsimd")

#undef BUILTIN
#undef TARGET_BUILTIN
10 changes: 10 additions & 0 deletions clang/include/clang/Basic/TargetBuiltins.h
Original file line number Diff line number Diff line change
Expand Up @@ -139,12 +139,22 @@ namespace clang {
};
}

namespace RISCVCOREV {
enum {
LastRVVBuiltin = RISCVVector::FirstTSBuiltin - 1,
#define BUILTIN(ID, TYPE, ATTRS) BI__builtin_riscv_cv_##ID,
#include "clang/Basic/BuiltinsRISCVCOREV.def"
FirstTSBuiltin,
};
}

/// RISCV builtins
namespace RISCV {
enum {
LastTIBuiltin = clang::Builtin::FirstTSBuiltin - 1,
FirstRVVBuiltin = clang::Builtin::FirstTSBuiltin,
LastRVVBuiltin = RISCVVector::FirstTSBuiltin - 1,
LastCOREVBuiltin = RISCVCOREV::FirstTSBuiltin - 1,
#define BUILTIN(ID, TYPE, ATTRS) BI##ID,
#include "clang/Basic/BuiltinsRISCV.def"
LastTSBuiltin
Expand Down
1 change: 1 addition & 0 deletions clang/include/clang/module.modulemap
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@ module Clang_Basic {
textual header "Basic/BuiltinsNVPTX.def"
textual header "Basic/BuiltinsPPC.def"
textual header "Basic/BuiltinsRISCV.def"
textual header "Basic/BuiltinsRISCVCOREV.def"
textual header "Basic/BuiltinsRISCVVector.def"
textual header "Basic/BuiltinsSVE.def"
textual header "Basic/BuiltinsSystemZ.def"
Expand Down
5 changes: 5 additions & 0 deletions clang/lib/Basic/Targets/RISCV.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -200,6 +200,11 @@ const Builtin::Info RISCVTargetInfo::BuiltinInfo[] = {
#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
{#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
#include "clang/Basic/BuiltinsRISCVVector.def"
#define BUILTIN(ID, TYPE, ATTRS) \
{"__builtin_riscv_cv_" #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
{"__builtin_riscv_cv_" #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
#include "clang/Basic/BuiltinsRISCVCOREV.def"
#define BUILTIN(ID, TYPE, ATTRS) \
{#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
Expand Down
29 changes: 29 additions & 0 deletions clang/lib/CodeGen/CGBuiltin.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19354,6 +19354,28 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
return nullptr;
}

static Value *EmitCoreVIntrinsic(CodeGenFunction &CGF, unsigned IntrinsicID,
MutableArrayRef<Value *> Ops,
const CallExpr *E) {
llvm::Type *MachineType =
llvm::IntegerType::getInt32Ty(CGF.CGM.getLLVMContext());
for (unsigned i = 0, e = E->getNumArgs(); i != e; i++) {
if (Ops[i]->getType() != MachineType) {
QualType type = E->getArg(i)->getType();
assert((type->isSignedIntegerType() || type->isUnsignedIntegerType()) &&
"Argument of Core-V builtin must have signed or unsigned integer "
"type");
if (type->isSignedIntegerType()) {
Ops[i] = CGF.Builder.CreateSExt(Ops[i], MachineType);
} else {
Ops[i] = CGF.Builder.CreateZExt(Ops[i], MachineType);
}
}
}
llvm::Function *F = CGF.CGM.getIntrinsic(IntrinsicID);
return CGF.Builder.CreateCall(F, Ops);
}

Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
const CallExpr *E,
ReturnValueSlot ReturnValue) {
Expand Down Expand Up @@ -19575,6 +19597,13 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
ID = Intrinsic::riscv_sm3p1;
IntrinsicTypes = {ResultType};
break;

// CoreV
#define BUILTIN(NAME, TYPE, ATTRS) \
case RISCVCOREV::BI__builtin_riscv_cv_##NAME: \
ID = Intrinsic::riscv_cv_##NAME; \
return EmitCoreVIntrinsic(*this, ID, Ops, E);
#include "clang/Basic/BuiltinsRISCVCOREV.def"

// Vector builtins are handled from here.
#include "clang/Basic/riscv_vector_builtin_cg.inc"
Expand Down
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