Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp

This project is about designing a 1.5-bit stage Pipeline ADC & a Boosted OpAmp required for its MDAC.

Whole System:

Schematics:

1) Comparator:

Refer to: https://github.com/muhammadaldacher/Analog-Design-of-Dynamic-Comparator

2) Switches:

Refer to: https://github.com/muhammadaldacher/Analog-Design-of-Bootstrapped-Switch

3) Sub-ADC Logic:

4) OpAmp Design:

==> Fully-Differential Gain-Boosted Telescopic OpAmp: (Main OpAmp)

-> NMOS-input, Single Ended Output, Folded Cascode OpAmp:

-> PMOS-input, Single Ended Output, Folded Cascode OpAmp:

* Testbench for Single-Ended-Output OpAmps:

* Testbench for Boosted (Fully-Differential) OpAmp:

>> Bode Plots of the Boosted OpAmp:

Whole System Simulation:

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References:

More on OpAmp Design:
-> https://github.com/muhammadaldacher/Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp/blob/master/B-%20Design%20of%20OpAmp%20for%20MDAC/Notes_OPAMP_for_ADC.pdf
-> https://github.com/muhammadaldacher/Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp/blob/master/B-%20Design%20of%20OpAmp%20for%20MDAC/Basic%20OpAmp%20Design%20and%20Compensation.pdf
Tutorial Videos on OpAmp Design on Virtuoso Cadence:
-> https://www.youtube.com/playlist?list=PLK2eyR1C9gjoBp61ZDvz6Zdd_6Hu7vZTz
My project on google drive:
https://drive.google.com/drive/folders/1W9ip4MpMZNf3IQsoFQkhgg6QaUya4Yp4
EE288 Lecture Notes:
https://drive.google.com/drive/folders/12Qqfw_TX1i7dvVVYXksaSdHV4gth1OD5
Some papers on Gain-Boosted Opamps:
https://ieeexplore.ieee.org/document/1635302
https://ieeexplore.ieee.org/document/4266730