0.10.0

What's Changed

Documentation Changes

• Removed references to no longer existing tcontrol and tdata3 CSRs by @Silabs-ArjanB in #839
• Updated OBI to version v1.6.0 by @Silabs-ArjanB in #838
• Fix Typo - "minsttatus" by @silabs-robin in #854
• Updated to version 0.9-draft, 6/6/2023 of CLIC specification by @Silabs-ArjanB in #870
• Changed Debug version to 1.0-STABLE, f4ac44e0d5f6993562bc6826d01ef5fe… by @Silabs-ArjanB in #871
• Removed parameter CLIC_INTTHRESHBITS from the user manual. by @silabs-oysteink in #873
• Version 2 RTD configuration file by @MikeOpenHWGroup in #880
• Updated RISC-V debug spec to version of June 23 2023 by @Silabs-ArjanB in #913
• Added statement that wu_wfe_i is positive level sensitive by @Silabs-ArjanB in #914
• Updated RISC-V CLIC version to 8/1/2023 version by @Silabs-ArjanB in #915
• Fix for issue #881 by @silabs-oysteink in #920
• Updated description of tdata2 view for trigger type 5 by @silabs-oysteink in #924
• Remove mscratchcsw CSR from manual by @silabs-halfdan in #932
• Corrected simulation trace documentation by @silabs-oivind in #936
• Updated cycle counts in the pipeline chapter. by @silabs-oysteink in #942
• Added missing signals to rvfi_mem documentation. by @silabs-oysteink in #948
• Updated description of rvfi_mem_rdata, rvfi_mem_exokay, rvfi_mem_memt… by @silabs-oysteink in #954
• Fix for issue #586 by @silabs-oysteink in #955
• Updated debug spec version to 1.0-STABLE as of September 11th 2023. by @silabs-oysteink in #956
• Updated list of unused OBI signals for instruction and data OBI. by @silabs-oysteink in #960
• Updated CLIC spec to version 0.9-draft 9/1/2023. by @silabs-oysteink in #962
• Listing all added RVFI signals in then RVFI chapter of the user manual. by @silabs-oysteink in #966
• Updated debug spec version to 1.0-STABLE as of october 12th 2023. by @silabs-oysteink in #970
• Updated privilege spec to 20211203. by @silabs-oysteink in #971

RTL Changes

• Added usage of 'csr_next_value' function for almost all CSRs. by @silabs-oysteink in #836
• Added 'XIF' to all X_EXT related todo's. by @silabs-oysteink in #840
• Removed two TODO's related to wb_valid. by @silabs-oysteink in #842
• Removed two no longer relevant TODO's in id_stage. by @silabs-oysteink in #843
• Removed todo in prefetcher, updated comment. by @silabs-oysteink in #844
• Signal rename and comment clean-up by @Silabs-ArjanB in #846
• Signal rename by @Silabs-ArjanB in #847
• Fix for issue #546 by @silabs-oysteink in #848
• Dead code removal by @Silabs-ArjanB in #850
• Lint fixes by @silabs-oivind in #852
• Uniquify modules by @silabs-oivind in #855
• Refactored tdata1_n logic by @silabs-oysteink in #856
• Updates due to updated debug spec by @silabs-oysteink in #858
• Update to latest CLIC spec (Version 0.9-draft, 4/11/2023) by @silabs-oysteink in #859
• Added RVFI visibility of HW writes to mcontrol6 by @silabs-oysteink in #861
• Fix for issue #808. by @silabs-oysteink in #864
• Fixed issue where branch_addr_n would be miscalculated for a CLIC SHV… by @silabs-oysteink in #865
• Removed parameter CLIC_INTTHRESHBITS by @silabs-oysteink in #872
• Dret to lower privilege mode no longer clears mintthresh. by @silabs-oysteink in #874
• Lint cleanup by @silabs-oivind in #875
• Lint cleanup by @silabs-oivind in #878
• Removed four no longer relevant TODO's. by @silabs-oysteink in #883
• Fix for issue #884. by @silabs-oysteink in #886
• Lint fix for issue #884 by @silabs-oysteink in #887
• Todo removal: Bus errors in LSU by @silabs-oysteink in #888
• Removed todo in i_decoder and added comments for each use of ctrl_fsm… by @silabs-oysteink in #897
• Removed two todos in controller_fsm. by @silabs-oysteink in #900
• Removed todo in clic_int_controller. by @silabs-oysteink in #898
• Removed todo about local vs flopped intsr_valid within the bypass mod… by @silabs-oysteink in #899
• Removed todo's in EX stage. by @silabs-oysteink in #901
• Added a separate 'modified_access_i' to the MPU and PMA and refactore… by @silabs-oysteink in #905
• Removed three TODO's in the pkg file. by @silabs-oysteink in #906
• Removed TODO in ID stage. Path mentioned in TODO cannot be found, lik… by @silabs-oysteink in #907
• Removed two todo's in the sequencer. by @silabs-oysteink in #908
• Removed todo in MPU by @silabs-oysteink in #903
• Removed two todo's in the controller FSM. by @silabs-oysteink in #909
• Fixed unconnected input to MPU in IF stage. by @silabs-oysteink in #910
• Fix for issue #882 by @silabs-oysteink in #918
• Fixed todo's related to mul_en/div_en i EX stage by @silabs-oysteink in #902
• Optimized CSR stalls by @silabs-oysteink in #917
• Removed todo about interrupt controller suffix. by @silabs-oysteink in #921
• Fixed mask for tdata2 to only include exception codes 4 and 6 when A_EXT != A_NONE. by @silabs-oysteink in #923
• Removed CSR mscratchcsw. by @silabs-oysteink in #925
• Fix todo in assertion a_valid_jump. by @silabs-oivind in #927
• Updates for CLIC spec (august 23) by @silabs-oysteink in #928
• Removed dependency on mcause.mpp when checking if an mret will genera… by @silabs-oysteink in #935
• Controller_fsm cleanup and asserts by @silabs-oysteink in #937
• Fix TODO in RTL. Updated use of priv-lvl signals to match cv32e40s by @silabs-oivind in #938
• Parameterize Zicntr and Xif features by @silabs-halfdan in #951
• Fixes after running SEC vs cv32e40s with SECURE=0. by @silabs-oysteink in #952
• Introduced type for lsu_err_wb by @silabs-oysteink in #958
• Fixed undriven signals by @silabs-oysteink in #961
• Sequencer clock gate optimization by @silabs-oysteink in #963
• Mul/div update for kill by @silabs-oysteink in #965
• Misc cleanup of unused signals. by @silabs-oysteink in #967
• Lint fixes. Don't use logical operators on multi-bit signals by @silabs-oivind in #968

New Contributors

• @silabs-krdosvik made their first contribution in #853

Full Changelog: 0.9.0...0.10.0