[doc] encode the the exposed op-mode directly, without any conversion

Signed-off-by: Szymon Bieganski <[email protected]>
openhwgroup · Dec 4, 2023 · e6f07cc · e6f07cc
1 parent d858331
commit e6f07cc
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/doc/01_specification/index.rst b/doc/01_specification/index.rst
@@ -253,8 +253,8 @@ Operating modes (Privilege Levels)
 +--------+--------------------------------------------------------------+
 | PVL-30 | CV32E20 shall export the CPU's operating mode as an address  |
 |        | phase attribute output signals on the Harvard memory         |
-|        | interfaces (instruction fetch, data load/store) with machine |
-|        | mode defined as 1'b1 and user mode as 1'b0.                  |
+|        | interfaces (instruction fetch, data load/store) with mode    |
+|        | encoded as per specification in [RVpriv]_.                   |
 +--------+--------------------------------------------------------------+
 | PVL-40 | CV32E20 shall support the **bare** (addressing) mode, that   |
 |        | is, no support for address translation or protection.        |