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os-fpga / yosys_verific_rs Public

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yosys-verific CI

Adding pass through LUTs before handling dangling wires. #1025

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Adding pass through LUTs before handling dangling wires.

Adding pass through LUTs before handling dangling wires. #1025

Summary
Jobs
- test
- install
- designEdit
- centos7-gcc
- macos-gcc
- macos-clang
Run details
- Usage
- Workflow file

Usage Workflow file

centos7-gcc

succeeded Sep 10, 2024 in 34m 4s

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