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Merge pull request #775 from AYYAZmayo/main
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EDA-977 gate_clock_conversion
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@AYYAZmayo
AYYAZmayo authored Aug 30, 2024
2 parents 5c3f3ac + 193eaf8 commit 7e28185
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2 changes: 1 addition & 1 deletion yosys-rs-plugin
Submodule yosys-rs-plugin updated 1 files
+317 −3 src/synth_rapidsilicon.cc

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