Merge pull request #554 from red031000/master

cleanup MI_dma_card
pret · Oct 4, 2024 · b5b670c · b5b670c
2 parents d6e4cdc + 601370a
commit b5b670c
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diff --git a/arm7/lib/include/MI_dma.h b/arm7/lib/include/MI_dma.h
@@ -1,10 +1,21 @@
-#ifndef POKEDIAMOND_ARM7_MI_DMA_H
-#define POKEDIAMOND_ARM7_MI_DMA_H
+#ifndef NITRO_MI_DMA_H
+#define NITRO_MI_DMA_H
 
 #include "nitro/MI_dma_shared.h"
 #include "nitro/types.h"
 
+#include "registers.h"
+
+#define MI_DMA_TIMING_MASK (3UL << 28)
+#define MI_DMA_TIMING_CARD (2UL << 28)
+
 void MI_StopDma(u32 channel);
 void MI_WaitDma(u32 channel);
 
-#endif
+#define MIi_WAIT_BEFOREDMA(dmaCntp, dmaNo)                    \
+    do {                                                      \
+        dmaCntp = &((vu32 *)REG_DMA0SAD_ADDR)[dmaNo * 3 + 2]; \
+        while (*dmaCntp & REG_MI_DMA0CNT_E_MASK) {}           \
+    } while (0)
+
+#endif // NITRO_MI_DMA_H
diff --git a/arm7/lib/include/registers.h b/arm7/lib/include/registers.h
@@ -1,37 +1,36 @@
-#ifndef POKEDIAMOND_ARM7_REGISTERS_H
-#define POKEDIAMOND_ARM7_REGISTERS_H
+#ifndef NITRO_REGISTERS_H
+#define NITRO_REGISTERS_H
 
 #include "nitro/registers_shared.h"
 
 #define reg_EXTKEYIN (*(REGType16v *)0x4000136)
 
 #define reg_POWCNT2 (*(REGType16v *)0x4000304)
 
-
 #define reg_SOUNDCNT_VOL (*(REGType8v *)0x4000500)
 #define reg_SOUNDCNT_MIX (*(REGType8v *)0x4000501)
 
-#define reg_SOUNDxCNT_VOL(x)    (*(REGType8v *)(0x4000400 + ((int)(x) * 0x10)))
-#define reg_SOUNDxCNT_VOLS(x)   (*(REGType16v *)(0x4000400 + ((int)(x) * 0x10)))
-#define reg_SOUNDxCNT_PAN(x)    (*(REGType8v *)(0x4000402 + ((int)(x) * 0x10)))
-#define reg_SOUNDxCNT_STAT(x)   (*(REGType8v *)(0x4000403 + ((int)(x) * 0x10)))
-#define reg_SOUNDxCNT(x)        (*(REGType32v *)(0x4000400 + ((int)x) * 0x10))
-#define reg_SOUNDoffCNT(off)    (*(REGType32v *)(0x4000400 + (int)(off)))
-#define reg_SOUNDxSAD(x)        (*(REGType32v *)(0x4000404 + ((int)x) * 0x10))
-#define reg_SOUNDoffSAD(off)    (*(REGType32v *)(0x4000404 + (int)(off)))
-#define reg_SOUNDxTMR(x)        (*(REGType16v *)(0x4000408 + ((int)x) * 0x10))
-#define reg_SOUNDoffTMR(off)    (*(REGType16v *)(0x4000408 + (int)(off)))
-#define reg_SOUNDxPNT(x)        (*(REGType16v *)(0x400040A + ((int)x) * 0x10))
-#define reg_SOUNDoffPNT(off)    (*(REGType16v *)(0x400040A + (int)(off)))
-#define reg_SOUNDxLEN(x)        (*(REGType32v *)(0x400040C + ((int)x) * 0x10))
-#define reg_SOUNDoffLEN(off)    (*(REGType32v *)(0x400040C + (int)(off)))
+#define reg_SOUNDxCNT_VOL(x)  (*(REGType8v *)(0x4000400 + ((int)(x) * 0x10)))
+#define reg_SOUNDxCNT_VOLS(x) (*(REGType16v *)(0x4000400 + ((int)(x) * 0x10)))
+#define reg_SOUNDxCNT_PAN(x)  (*(REGType8v *)(0x4000402 + ((int)(x) * 0x10)))
+#define reg_SOUNDxCNT_STAT(x) (*(REGType8v *)(0x4000403 + ((int)(x) * 0x10)))
+#define reg_SOUNDxCNT(x)      (*(REGType32v *)(0x4000400 + ((int)x) * 0x10))
+#define reg_SOUNDoffCNT(off)  (*(REGType32v *)(0x4000400 + (int)(off)))
+#define reg_SOUNDxSAD(x)      (*(REGType32v *)(0x4000404 + ((int)x) * 0x10))
+#define reg_SOUNDoffSAD(off)  (*(REGType32v *)(0x4000404 + (int)(off)))
+#define reg_SOUNDxTMR(x)      (*(REGType16v *)(0x4000408 + ((int)x) * 0x10))
+#define reg_SOUNDoffTMR(off)  (*(REGType16v *)(0x4000408 + (int)(off)))
+#define reg_SOUNDxPNT(x)      (*(REGType16v *)(0x400040A + ((int)x) * 0x10))
+#define reg_SOUNDoffPNT(off)  (*(REGType16v *)(0x400040A + (int)(off)))
+#define reg_SOUNDxLEN(x)      (*(REGType32v *)(0x400040C + ((int)x) * 0x10))
+#define reg_SOUNDoffLEN(off)  (*(REGType32v *)(0x400040C + (int)(off)))
 
 #define reg_SNDCAPxCNT(x) (*(REGType8v *)(0x4000508 + ((int)(x))))
 
-#define EXTKEYIN_X (1<<0)
-#define EXTKEYIN_Y (1<<1)
-#define EXTKEYIN_DEBUG (1<<3)
-#define EXTKEYIN_PEN (1<<6)
-#define EXTKEYIN_HINGE (1<<7)
+#define EXTKEYIN_X     (1 << 0)
+#define EXTKEYIN_Y     (1 << 1)
+#define EXTKEYIN_DEBUG (1 << 3)
+#define EXTKEYIN_PEN   (1 << 6)
+#define EXTKEYIN_HINGE (1 << 7)
 
-#endif //POKEDIAMOND_ARM7_REGISTERS_H
+#endif // NITRO_REGISTERS_H
diff --git a/arm7/lib/src/MI_dma.c b/arm7/lib/src/MI_dma.c
@@ -1,13 +1,16 @@
 #include "MI_dma.h"
+
 #include "OS_system.h"
 #include "code32.h"
 
 void MI_WaitDma(u32 channel) {
     OSIntrMode mode = OS_DisableInterrupts();
-    vu32 * addr = (vu32 *)(REG_ADDR_DMA0SAD + (channel * 3 + 2) * 4);
-    while(addr[0] & 0x80000000) ;
+    vu32 *addr;
+
+    MIi_WAIT_BEFOREDMA(addr, channel);
+
     if (channel == 0) {
-        addr = (vu32 *)(REG_ADDR_DMA0SAD + channel * 12);
+        addr    = (vu32 *)(REG_DMA0SAD_ADDR + channel * 12);
         addr[0] = 0;
         addr[1] = 0;
         addr[2] = 0x81400001;
@@ -17,20 +20,20 @@ void MI_WaitDma(u32 channel) {
 
 void MI_StopDma(u32 channel) {
     OSIntrMode mode = OS_DisableInterrupts();
-    vu16 * addr = (vu16 *)(REG_ADDR_DMA0SAD + (channel * 6 + 5) * 2);
-    addr[0] &= ~(DMA_START_MASK | DMA_REPEAT);
-    addr[0] &= ~DMA_ENABLE;
+    vu16 *addr      = (vu16 *)(REG_DMA0SAD_ADDR + (channel * 6 + 5) * 2);
+    addr[0] &= ~((MI_DMA_TIMING_MASK | MI_DMA_CONTINUOUS_ON) >> 16);
+    addr[0] &= ~(MI_DMA_ENABLE >> 16);
     {
         s32 dummy = addr[0];
     }
     {
         s32 dummy = addr[0];
     }
     if (channel == 0) {
-        vu32 * addr32 = (vu32 *)(REG_ADDR_DMA0SAD + channel * 12);
-        addr32[0] = 0;
-        addr32[1] = 0;
-        addr32[2] = 0x81400001;
+        vu32 *addr32 = (vu32 *)(REG_DMA0SAD_ADDR + channel * 12);
+        addr32[0]    = 0;
+        addr32[1]    = 0;
+        addr32[2]    = 0x81400001;
     }
     mode = OS_RestoreInterrupts(mode);
 }
diff --git a/arm9/lib/NitroSDK/include/MI_dma.h b/arm9/lib/NitroSDK/include/MI_dma.h
@@ -1,34 +1,39 @@
-#ifndef POKEDIAMOND_ARM9_MI_DMA_H
-#define POKEDIAMOND_ARM9_MI_DMA_H
+#ifndef NITRO_MI_DMA_H
+#define NITRO_MI_DMA_H
 
 #include "nitro/MI_dma_shared.h"
-#include "consts.h"
+
 #include "OS_system.h"
+#include "consts.h"
 
 typedef void (*MIDmaCallback)(void *);
 
-#define MI_DMA_MAX_NUM          3
+#define MI_DMA_MAX_NUM 3
+
+#define MI_DMA_TIMING_MASK (7UL << 27)
+#define MI_DMA_TIMING_CARD (5UL << 27)
 
-#define REG_ADDR_DMA0CNT        0x40000b8
-#define REG_ADDR_DMA0_CLR_DATA  0x40000e0
+#define MI_CNT_CARDRECV32(size) (MI_DMA_ENABLE | MI_DMA_TIMING_CARD | MI_DMA_SRC_FIX | MI_DMA_DEST_INC | MI_DMA_32BIT_BUS | ((size) / 4))
 
-#define MI_CNT_CLEAR32(size)    (0x85000000 | ((size)/4))
-#define MI_CNT_CLEAR32_IF(size) (0xc5000000 | ((size)/4))
-#define MI_CNT_COPY32(size)     (0x84000000 | ((size)/4))
-#define MI_CNT_COPY32_IF(size)  (0xc4000000 | ((size)/4))
-#define MI_CNT_COPY16(size)     (0x80000000 | ((size)/2))
+#define REG_ADDR_DMA0CNT       0x40000b8
+#define REG_ADDR_DMA0_CLR_DATA 0x40000e0
 
-#define MI_DMA_SRC_FIX          (2UL << 23)
-#define MI_DMA_SRC_INC          (0UL << 23)
+#define MI_CNT_CLEAR32(size)    (0x85000000 | ((size) / 4))
+#define MI_CNT_CLEAR32_IF(size) (0xc5000000 | ((size) / 4))
+#define MI_CNT_COPY32(size)     (0x84000000 | ((size) / 4))
+#define MI_CNT_COPY32_IF(size)  (0xc4000000 | ((size) / 4))
+#define MI_CNT_COPY16(size)     (0x80000000 | ((size) / 2))
 
-#define MI_DMA_16BIT_BUS        (0UL << 26)
-#define MI_DMA_32BIT_BUS        (1UL << 26)
+#define MIi_DMA_TIMING_ANY    (u32)(~0)
+#define MI_DMA_TIMING_H_BLANK (2UL << 27)
 
-#define MIi_DMA_TIMING_ANY      (u32)(~0)
-#define MI_DMA_TIMING_H_BLANK   (2UL << 27)
+#define MIi_WAIT_BEFOREDMA(dmaCntp, dmaNo)                    \
+    do {                                                      \
+        dmaCntp = &((vu32 *)REG_DMA0SAD_ADDR)[dmaNo * 3 + 2]; \
+        while (*dmaCntp & REG_MI_DMA0CNT_E_MASK) {}           \
+    } while (0)
 
-typedef union
-{
+typedef union {
     u32 b32;
     u16 b16;
 } MIiDmaClearSrc;
@@ -47,34 +52,30 @@ void MIi_DmaSetParams_wait(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
 void MIi_DmaSetParams_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
 void MIi_DmaSetParams_wait_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
 
-static inline void MIi_DmaSetParams_wait_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl)
-{
+static inline void MIi_DmaSetParams_wait_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl) {
     OSIntrMode lastIntrMode = OS_DisableInterrupts();
 
-    MIiDmaClearSrc *scrp = (MIiDmaClearSrc *) ((u32)REG_ADDR_DMA0_CLR_DATA + dmaNo * 4);
-    scrp->b32 = data;
+    MIiDmaClearSrc *scrp = (MIiDmaClearSrc *)((u32)REG_ADDR_DMA0_CLR_DATA + dmaNo * 4);
+    scrp->b32            = data;
     MIi_DmaSetParams_wait_noInt(dmaNo, (u32)scrp, dest, ctrl);
 
     (void)OS_RestoreInterrupts(lastIntrMode);
 }
 
-static inline void MIi_DmaSetParams_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl)
-{
+static inline void MIi_DmaSetParams_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl) {
     OSIntrMode lastIntrMode = OS_DisableInterrupts();
 
-    MIiDmaClearSrc *srcp = (MIiDmaClearSrc *) ((u32)REG_ADDR_DMA0_CLR_DATA + dmaNo * 4);
-    srcp->b32 = data;
+    MIiDmaClearSrc *srcp = (MIiDmaClearSrc *)((u32)REG_ADDR_DMA0_CLR_DATA + dmaNo * 4);
+    srcp->b32            = data;
     MIi_DmaSetParams_noInt(dmaNo, (u32)srcp, dest, ctrl);
 
     (void)OS_RestoreInterrupts(lastIntrMode);
 }
 
-static inline void MIi_CallCallback(MIDmaCallback callback, void *arg)
-{
-    if (callback)
-    {
-        (callback) (arg);
+static inline void MIi_CallCallback(MIDmaCallback callback, void *arg) {
+    if (callback) {
+        (callback)(arg);
     }
 }
 
-#endif //POKEDIAMOND_ARM9_MI_DMA_H
+#endif // NITRO_MI_DMA_H
diff --git a/arm9/lib/NitroSDK/include/MI_dma_card.h b/arm9/lib/NitroSDK/include/MI_dma_card.h
@@ -1,8 +1,8 @@
-#ifndef POKEDIAMOND_MI_DMA_CARD_H
-#define POKEDIAMOND_MI_DMA_CARD_H
+#ifndef NITRO_MI_DMA_CARD_H
+#define NITRO_MI_DMA_CARD_H
 
 #include "nitro/types.h"
 
 void MIi_CardDmaCopy32(u32 dmaNo, const void *src, void *dest, u32 size);
 
-#endif //POKEDIAMOND_MI_DMA_CARD_H
+#endif // NITRO_MI_DMA_CARD_H