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[ARM64_DYNAREC] Various small fixes for some 16bits math/logic opcodes
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ptitSeb committed Nov 13, 2024
1 parent 09b8c3b commit 0f4f274
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Showing 6 changed files with 35 additions and 36 deletions.
30 changes: 15 additions & 15 deletions src/dynarec/arm64/dynarec_arm64_66.c
Original file line number Diff line number Diff line change
Expand Up @@ -78,9 +78,9 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
case 0x05:
INST_NAME("ADD AX, Iw");
SETFLAGS(X_ALL, SF_SET_PENDING);
i32 = F16;
i16 = F16;
UXTHw(x1, xRAX);
MOV32w(x2, i32);
MOV32w(x2, i16);
emit_add16(dyn, ninst, x1, x2, x3, x4);
BFIz(xRAX, x1, 0, 16);
break;
Expand Down Expand Up @@ -117,9 +117,9 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
case 0x0D:
INST_NAME("OR AX, Iw");
SETFLAGS(X_ALL, SF_SET_PENDING);
i32 = F16;
i16 = F16;
UXTHw(x1, xRAX);
emit_or16c(dyn, ninst, x1, i32, x3, x4);
emit_or16c(dyn, ninst, x1, i16, x3, x4);
BFIz(xRAX, x1, 0, 16);
break;

Expand Down Expand Up @@ -154,9 +154,9 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
INST_NAME("ADC AX, Iw");
READFLAGS(X_CF);
SETFLAGS(X_ALL, SF_SET_PENDING);
i32 = F16;
i16 = F16;
UXTHw(x1, xRAX);
MOV32w(x2, i32);
MOV32w(x2, i16);
emit_adc16(dyn, ninst, x1, x2, x3, x4);
BFIz(xRAX, x1, 0, 16);
break;
Expand Down Expand Up @@ -224,9 +224,9 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
case 0x25:
INST_NAME("AND AX, Iw");
SETFLAGS(X_ALL, SF_SET_PENDING);
i32 = F16;
i16 = F16;
UXTHw(x1, xRAX);
emit_and16c(dyn, ninst, x1, i32, x3, x4);
emit_and16c(dyn, ninst, x1, i16, x3, x4);
BFIz(xRAX, x1, 0, 16);
break;

Expand All @@ -251,9 +251,9 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
case 0x2D:
INST_NAME("SUB AX, Iw");
SETFLAGS(X_ALL, SF_SET_PENDING);
i32 = F16;
i16 = F16;
UXTHw(x1, xRAX);
MOV32w(x2, i32);
MOV32w(x2, i16);
emit_sub16(dyn, ninst, x1, x2, x3, x4);
BFIz(xRAX, x1, 0, 16);
break;
Expand All @@ -279,9 +279,9 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
case 0x35:
INST_NAME("XOR AX, Iw");
SETFLAGS(X_ALL, SF_SET_PENDING);
i32 = F16;
i16 = F16;
UXTHw(x1, xRAX);
emit_xor16c(dyn, ninst, x1, i32, x3, x4);
emit_xor16c(dyn, ninst, x1, i16, x3, x4);
BFIz(xRAX, x1, 0, 16);
break;

Expand All @@ -304,10 +304,10 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
case 0x3D:
INST_NAME("CMP AX, Iw");
SETFLAGS(X_ALL, SF_SET_PENDING);
i32 = F16;
i16 = F16;
UXTHw(x1, xRAX);
if(i32) {
MOV32w(x2, i32);
if(i16) {
MOV32w(x2, i16);
emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5);
} else {
emit_cmp16_0(dyn, ninst, x1, x3, x4);
Expand Down
8 changes: 4 additions & 4 deletions src/dynarec/arm64/dynarec_arm64_660f.c
Original file line number Diff line number Diff line change
Expand Up @@ -2657,16 +2657,16 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
case 0xBF:
INST_NAME("MOVSX Gw, Ew");
nextop = F8;
GETGW(x1);
GETGD;
if(MODREG) {
ed = xRAX+(nextop&7)+(rex.b<<3);
SXTHxw(gd, ed);
SXTHxw(x1, ed);
} else {
SMREAD();
addr = geted(dyn, addr, ninst, nextop, &ed, x3, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0);
LDSHxw(gd, ed, fixedaddress);
LDSHxw(x1, ed, fixedaddress);
}
GWBACK;
BFIx(gd, x1, 0, 16);
break;

case 0xC1:
Expand Down
2 changes: 1 addition & 1 deletion src/dynarec/arm64/dynarec_arm64_6664.c
Original file line number Diff line number Diff line change
Expand Up @@ -248,7 +248,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
break;

case 0x8B:
INST_NAME("MOV Gd, FS:Ed");
INST_NAME("MOV Gw, FS:Ew");
nextop=F8;
GETGD;
if(MODREG) { // reg <= reg
Expand Down
3 changes: 1 addition & 2 deletions src/dynarec/arm64/dynarec_arm64_66f0.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,6 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
uint8_t gd, ed, u8;
uint8_t wback, wb1, wb2, gb1, gb2;
int16_t i16;
int32_t i32;
int64_t i64, j64;
int64_t fixedaddress;
int unscaled;
Expand Down Expand Up @@ -344,7 +343,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
}
} else {
i64 = convert_bitmask_w(i16);
if(!i64) {MOV32w(x5, i32);}
if(!i64) {MOV32w(x5, i16);}
MARKLOCK;
LDAXRH(x1, wback);
if(i64) {
Expand Down
20 changes: 10 additions & 10 deletions src/dynarec/arm64/dynarec_arm64_emit_math.c
Original file line number Diff line number Diff line change
Expand Up @@ -345,18 +345,18 @@ void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
}

// emit ADD8 instruction, from s1, const c, store result in s1 using s3 and s4 as scratch
void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4)
void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4)
{
IFX(X_PEND) {
MOV32w(s4, c&0xff);
MOV32w(s4, c);
STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
STRB_U12(s4, xEmu, offsetof(x64emu_t, op2));
SET_DF(s3, d_add8);
} else IFX(X_ALL) {
SET_DFNONE(s3);
}
IFX(X_AF | X_OF) {
IFX(X_PEND) {} else {MOV32w(s4, c&0xff);}
IFX(X_PEND) {} else {MOV32w(s4, c);}
ORRw_REG(s3, s1, s4); // s3 = op1 | op2
ANDw_REG(s4, s1, s4); // s4 = op1 & op2
}
Expand Down Expand Up @@ -432,11 +432,11 @@ void emit_sub8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
}

// emit SUB8 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, int s5)
void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4, int s5)
{
MAYUSE(s5);
IFX(X_ALL|X_PEND) {
MOV32w(s5, c&0xff);
MOV32w(s5, c);
}
IFX(X_PEND) {
STRB_U12(s1, xEmu, offsetof(x64emu_t, op1));
Expand All @@ -453,7 +453,7 @@ void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, in
IFX(X_ALL) {
SUBw_REG(s1, s1, s5);
} else {
SUBw_U12(s1, s1, c&0xff);
SUBw_U12(s1, s1, c);
}
IFX(X_PEND) {
STRB_U12(s1, xEmu, offsetof(x64emu_t, res));
Expand Down Expand Up @@ -1181,10 +1181,10 @@ void emit_adc8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
}

// emit ADC8 instruction, from s1, const c, store result in s1 using s3 and s4 as scratch
void emit_adc8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, int s5)
void emit_adc8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4, int s5)
{
MAYUSE(s5);
MOV32w(s5, c&0xff);
MOV32w(s5, c);
emit_adc8(dyn, ninst, s1, s5, s3, s4);
}

Expand Down Expand Up @@ -1523,10 +1523,10 @@ void emit_sbb8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4)
}

// emit SBB8 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch
void emit_sbb8c(dynarec_arm_t* dyn, int ninst, int s1, int c, int s3, int s4, int s5)
void emit_sbb8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4, int s5)
{
MAYUSE(s5);
MOV32w(s5, c&0xff);
MOV32w(s5, c);
emit_sbb8(dyn, ninst, s1, s5, s3, s4);
}

Expand Down
8 changes: 4 additions & 4 deletions src/dynarec/arm64/dynarec_arm64_helper.h
Original file line number Diff line number Diff line change
Expand Up @@ -1438,11 +1438,11 @@ void emit_test32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s
void emit_add32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
void emit_add32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4, int s5);
void emit_add8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4);
void emit_add8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4);
void emit_sub32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
void emit_sub32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4, int s5);
void emit_sub8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4, int s5);
void emit_sub8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4, int s5);
void emit_or32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
void emit_or32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4);
void emit_xor32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
Expand Down Expand Up @@ -1474,13 +1474,13 @@ void emit_dec8(dynarec_arm_t* dyn, int ninst, int s1, int s3, int s4);
void emit_adc32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
//void emit_adc32c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4);
void emit_adc8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
void emit_adc8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4, int s5);
void emit_adc8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4, int s5);
void emit_adc16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
//void emit_adc16c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4);
void emit_sbb32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4);
//void emit_sbb32c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4);
void emit_sbb8(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
void emit_sbb8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4, int s5);
void emit_sbb8c(dynarec_arm_t* dyn, int ninst, int s1, int8_t c, int s3, int s4, int s5);
void emit_sbb16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4);
//void emit_sbb16c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4);
void emit_neg32(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int s3, int s4);
Expand Down

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