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treewide: Preparation for v1.0.0, add SV macros for type definitions and refactor module parametrization #65

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merged 42 commits into from
Sep 17, 2024

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fischeti
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Preparation for release v1.0.0

This PR introduces a lot of breaking changes to the way the SystemVerilog modules are parametrized. The reason for this drastic change is that a lot of features have been added to FlooNoC since the beginning including the automatic generation of networks with FlooGen. Some of the design decisions taken in the beginning of the development proved to be unsuitable when generating large networks.

For instance, the flit type packages in hw were auto generated with a python script and globally imported in the modules. When using FlooNoC as a library this is quite awkward and error-prone as the those packages need to be overwritten inside the .bender folder. Therefore, the auto-generation of all the types was removed in this PR in favor of SystemVerilog macros and some helper functions in the floo_pkg.

These breaking interface changes might be annoying, but the goal is that it will result in a release v1.0.0, which should stabilize the IPs. The changes are numerous and are given below:

Added

Hardware

  • The floo_pkg was extended with helper functions to calculate the size of AXI payloads and mapping of AXI to Floo Channels.
  • Multiple configuration structs were introduced to enable a more flexible and non-verbose configuration of the FlooNoC modules.
    • The AxiCfg describes all the necessary parameters needed for the type definitions of a bidirectional AXI interface
    • The RouteCfg describes all the necessary routing information parameters required by the chimneys.
    • The ChimneyCfg describes all other parameters for the data path of the chimney (e.g. Mgr/Sbr port enable, number of oustanding transactions, RoB types & sizes, etc.)
  • The floo_test_pkg now defines default configurations for all the new configuration structs that are used by the testbenches.

FlooGen

  • The data_width and user_width fields for protocols are now also validated to be compatible with each other.
  • All the various *Cfg's is now rendered by FlooGen, either in the *_noc_pkg or in the *_noc module itself.

Changed

Hardware

  • The floo_narrow_wide_* modules and the corresponding testbenches were renamed to floo_nw_* to be more concise.
  • The flit type definitions are now implemented as SystemVerilog macros in typedef.svh.
  • The parametrization of the chimney modules has changed dramatically. They now use the newly introduced *Cfg's from the floo_pkg. In the narrow-wide chimneys, both datapaths now have their own configs (i.e. *CfgN and *CfgW), to reduce the verbosity of the module instantiation.
  • The payload field name in each *_chan_t type previously had its own name. This was unified to payload since *_chan_t already determines the type of the payload.
  • The input and output buffer FIFO depth of the routers were renamed to InFifoDepth and OutFifoDepth to be more consistent (previously ChannelFifoDepth and OutputFifoDepth).
  • The narrow-wide router wrapper now also requires the AxiCfg structs to redefine the link types internally.
  • The ReorderBufferSize parameters was shortened to RoBSize.
  • All testbenches were adapted to all changes.
  • All verification IPs were adapted to the new configuration structs.

FlooGen

  • The link typedefs are now renderd with the macros in typedef.svh instead of rendering them in pure SystemVerilog.
  • The template files were renamed to use the more concise nw naming scheme.
  • The generated modules and packages of FlooGen are now named floo_*_noc resp. floo_*_noc_pkg which is more consistent since all other modules have the floo_* prefix.
  • The protocols schema was adapted a bit to be more intuitive.
    • The type field was renamed to protocol, which currently only accepts AXI4. A new type field now is used by FlooGen to now where to attach the protocol in the network interface. Currently, FlooGen only supports the narrow-wide AXI configuration, hence only narrow|wide is allowed as type values.
    • The direction field in the protocol schema is no longer required, since the direction is determined when specifying mgr_port_protocol and sbr_port_protocol.
    • The name field must be unique now, since it is used by mgr_port_protocol and sbr_port_protocol to reference the exact protocol.
    • All examples were adapted to reflect those changes.

Fixed

  • A bug in the calcuation of the RoB offset in floo_rob was fixed. Previously, the allocation and the write process used the same counter in bursts for offset calculation, which resulted in wrong offsets.

Removed

Hardware

  • As the flit type definitions were moved to typedef.svh, the auto-generated floo_*_pkg packages were removed from the repository. Furthermore, all the (global) imports of those packages in the modules were replaced by parameters.
  • The testbench tb_floo_nw_chimney was removed since it was neither used nor maintained anymore.
  • The IdIsPort routing algorithm was removed since it can only be used for routes over a single router. The same functionality can be achieved with the SourceRouting algorithm.

FlooGen

  • The package generation was removed from FlooGen since it is now handled by the typedef.svh file. Further, the --only-pkg and --pkg-outdir flags were removed from the FlooGen CLI.
  • The calculation of link sizes and AXI to Floo channel mapping was removed from the FlooGen configuration file. This is now handled by the floo_pkg helper functions.

@kgreig87
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Congrats on this coming release, this is a really cool and exciting project

@fischeti
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Thanks @kgreig87. I am glad you enjoy it!

hw(rob): Rename `ReorderBufferSize` to `RoBDepth`
`IdIsPort` only decodes a single router port in the `dst_id` and was
only used for verification purposes. The same functionality can be
achieved with `SourceRouting` where `route_t` is a single port (i.e.
`route_t == id_t`)
@fischeti fischeti merged commit 6c56140 into main Sep 17, 2024
13 checks passed
@fischeti fischeti deleted the type-macros branch September 17, 2024 12:10
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