Skip to content

Commit

Permalink
[hardware] Bump CVA6 instantiation and rtl
Browse files Browse the repository at this point in the history
  • Loading branch information
mp-17 committed Mar 12, 2024
1 parent cf210ec commit 143dd2e
Show file tree
Hide file tree
Showing 3 changed files with 99 additions and 52 deletions.
12 changes: 0 additions & 12 deletions hardware/src/ara.sv
Original file line number Diff line number Diff line change
Expand Up @@ -466,16 +466,4 @@ module ara import ara_pkg::*; #(
if (ara_pkg::VLEN != 2**$clog2(ara_pkg::VLEN))
$error("[ara] The vector length must be a power of two.");

if (RVVD(FPUSupport) && !ariane_pkg::RVD)
$error(
"[ara] Cannot support double-precision floating-point on Ara if Ariane does not support it.");

if (RVVF(FPUSupport) && !ariane_pkg::RVF)
$error(
"[ara] Cannot support single-precision floating-point on Ara if Ariane does not support it.");

if (RVVH(FPUSupport) && !ariane_pkg::XF16)
$error(
"[ara] Cannot support half-precision floating-point on Ara if Ariane does not support it.");

endmodule : ara
79 changes: 67 additions & 12 deletions hardware/src/ara_soc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
//
// Author: Matheus Cavalcante <[email protected]>
// Description:
// Ara's SoC, containing Ariane, Ara, and a L2 cache.
// Ara's SoC, containing CVA6, Ara, and a L2 cache.

module ara_soc import axi_pkg::*; import ara_pkg::*; #(
// RVV Parameters
Expand Down Expand Up @@ -441,10 +441,55 @@ module ara_soc import axi_pkg::*; import ara_pkg::*; #(

assign hart_id = '0;

localparam ariane_pkg::ariane_cfg_t ArianeAraConfig = '{
RASDepth : 2,
BTBEntries : 32,
BHTEntries : 128,
localparam config_pkg::cva6_cfg_t CVA6AraConfig = '{
NrCommitPorts : 2,
AxiAddrWidth : AxiAddrWidth,
AxiDataWidth : AxiNarrowDataWidth,
AxiIdWidth : AxiIdWidth,
AxiUserWidth : 1,
NrLoadBufEntries : 2,
FpuEn : 1,
XF16 : FPUSupport[0],
XF16ALT : 0,
XF8 : 0,
XF8ALT : 1,
RVA : 1,
RVB : 0,
RVV : 1,
RVC : 1,
RVH : 0,
RVZCB : 0,
XFVec : 0,
CvxifEn : 0,
ZiCondExtEn : 0,
RVSCLIC : 0,
RVF : FPUSupport[1],
RVD : FPUSupport[2],
FpPresent : 1,
NSX : 0,
FLen : 64,
RVFVec : 0,
XF16Vec : 0,
XF16ALTVec : 0,
XF8Vec : 0,
NrRgprPorts : 0,
NrWbPorts : 0,
EnableAccelerator : 1,
RVS : 1,
RVU : 1,
HaltAddress : 64'h800,
ExceptionAddress : 64'h808,
RASDepth : 2,
BTBEntries : 32,
BHTEntries : 128,
DmBaseAddress : 64'h0,
TvalEn : 1,
NrPMPEntries : 0,
PMPCfgRstVal : {16{64'h0}},
PMPAddrRstVal : {16{64'h0}},
PMPEntryReadOnly : 16'd0,
NOCType : config_pkg::NOC_TYPE_AXI4_ATOP,
CLICNumInterruptSrc : 0,
// idempotent region
NrNonIdempotentRules : 2,
NonIdempotentAddrBase: {64'b0, 64'b0},
Expand All @@ -457,12 +502,10 @@ module ara_soc import axi_pkg::*; import ara_pkg::*; #(
NrCachedRegionRules : 1,
CachedRegionAddrBase : {DRAMBase},
CachedRegionLength : {DRAMLength},
// cache config
AxiCompliant : 1'b1,
SwapEndianess : 1'b0,
// debug
DmBaseAddress : 64'h0,
NrPMPEntries : 0
MaxOutstandingStores : 7,
DebugEn : 1,
NonIdemPotenceEn : 1,
AxiBurstWriteEn : 0
};

`ifndef TARGET_GATESIM
Expand All @@ -471,7 +514,7 @@ module ara_soc import axi_pkg::*; import ara_pkg::*; #(
.FPUSupport (FPUSupport ),
.FPExtSupport (FPExtSupport ),
.FixPtSupport (FixPtSupport ),
.ArianeCfg (ArianeAraConfig ),
.CVA6Cfg (CVA6AraConfig ),
.AxiAddrWidth (AxiAddrWidth ),
.AxiIdWidth (AxiCoreIdWidth ),
.AxiNarrowDataWidth(AxiNarrowDataWidth ),
Expand Down Expand Up @@ -559,4 +602,16 @@ module ara_soc import axi_pkg::*; import ara_pkg::*; #(
if (AxiIdWidth == 0)
$error("[ara_soc] The AXI ID width must be greater than zero.");

if (RVVD(FPUSupport) && !CVA6AraConfig.RVD)
$error(
"[ara] Cannot support double-precision floating-point on Ara if CVA6 does not support it.");

if (RVVF(FPUSupport) && !CVA6AraConfig.RVF)
$error(
"[ara] Cannot support single-precision floating-point on Ara if CVA6 does not support it.");

if (RVVH(FPUSupport) && !CVA6AraConfig.XF16)
$error(
"[ara] Cannot support half-precision floating-point on Ara if CVA6 does not support it.");

endmodule : ara_soc
60 changes: 32 additions & 28 deletions hardware/src/ara_system.sv
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ module ara_system import axi_pkg::*; import ara_pkg::*; #(
// Support for fixed-point data types
parameter fixpt_support_e FixPtSupport = FixedPointEnable,
// Ariane configuration
parameter ariane_pkg::ariane_cfg_t ArianeCfg = ariane_pkg::ArianeDefaultConfig,
parameter config_pkg::cva6_cfg_t CVA6Cfg = cva6_config_pkg::cva6_cfg,
// AXI Interface
parameter int unsigned AxiAddrWidth = 64,
parameter int unsigned AxiIdWidth = 6,
Expand Down Expand Up @@ -112,35 +112,39 @@ module ara_system import axi_pkg::*; import ara_pkg::*; #(
);
`else
cva6 #(
.ArianeCfg(ArianeCfg),
.cvxif_req_t (acc_pkg::accelerator_req_t),
.cvxif_resp_t (acc_pkg::accelerator_resp_t),
.AxiAddrWidth ( AxiAddrWidth ),
.AxiDataWidth ( AxiNarrowDataWidth ),
.AxiIdWidth ( AxiIdWidth ),
.axi_ar_chan_t (ariane_axi_ar_t),
.axi_aw_chan_t (ariane_axi_aw_t),
.axi_w_chan_t (ariane_axi_w_t),
.axi_req_t (ariane_axi_req_t),
.axi_rsp_t (ariane_axi_resp_t)
.CVA6Cfg (CVA6Cfg ),
.cvxif_req_t (acc_pkg::accelerator_req_t ),
.cvxif_resp_t (acc_pkg::accelerator_resp_t),
.axi_ar_chan_t (ariane_axi_ar_t ),
.axi_aw_chan_t (ariane_axi_aw_t ),
.axi_w_chan_t (ariane_axi_w_t ),
.b_chan_t (ariane_axi_b_t ),
.r_chan_t (ariane_axi_r_t ),
.noc_req_t (ariane_axi_req_t ),
.noc_resp_t (ariane_axi_resp_t )
) i_ariane (
.clk_i (clk_i ),
.rst_ni (rst_ni ),
.boot_addr_i (boot_addr_i ),
.hart_id_i (hart_id ),
.irq_i ('0 ),
.ipi_i ('0 ),
.time_irq_i ('0 ),
.debug_req_i ('0 ),
.rvfi_o ( ),
.clk_i (clk_i ),
.rst_ni (rst_ni ),
.boot_addr_i (boot_addr_i ),
.hart_id_i (hart_id ),
.irq_i ('0 ),
.ipi_i ('0 ),
.time_irq_i ('0 ),
.debug_req_i ('0 ),
.clic_irq_valid_i ('0 ),
.clic_irq_id_i ('0 ),
.clic_irq_level_i ('0 ),
.clic_irq_priv_i (riscv::priv_lvl_t'(2'b0)),
.clic_irq_shv_i ('0 ),
.clic_irq_ready_o (/* empty */ ),
.clic_kill_req_i ('0 ),
.clic_kill_ack_o (/* empty */ ),
.rvfi_probes_o (/* empty */ ),
// Accelerator ports
.cvxif_req_o (acc_req ),
.cvxif_resp_i (acc_resp_pack ),
.l15_req_o ( ),
.l15_rtrn_i ( '0 ),
// Memory interface
.axi_req_o (ariane_narrow_axi_req ),
.axi_resp_i (ariane_narrow_axi_resp)
.cvxif_req_o (acc_req ),
.cvxif_resp_i (acc_resp_pack ),
.noc_req_o (ariane_narrow_axi_req ),
.noc_resp_i (ariane_narrow_axi_resp )
);
`endif

Expand Down

0 comments on commit 143dd2e

Please sign in to comment.