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[apps] Adapt mask logical tests to allowed tail behavior
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@mp-17
mp-17 committed Nov 1, 2024
1 parent 1c1aa2c commit 6b822f5
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Showing 8 changed files with 54 additions and 54 deletions.
14 changes: 7 additions & 7 deletions apps/riscv-tests/isa/rv64uv/vmand.c
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0x84, 0x21);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0xCD, 0xEF);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0x00, 0x00);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0x0D, 0xE0);
}

Expand All @@ -48,10 +48,10 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmand.mm v1, v2, v3");
VSET(2, e8, m1);
VCMP_U8(5, v1, 0x84, 0xE1);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0x84, 0x21);
}

void TEST_CASE6() {
Expand Down
14 changes: 7 additions & 7 deletions apps/riscv-tests/isa/rv64uv/vmandnot.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmandnot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0x49, 0xCE);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmandnot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0x00, 0x00);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmandnot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0xCD, 0xEF);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmandnot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0xC0, 0x0F);
}

Expand All @@ -48,10 +48,10 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmandnot.mm v1, v2, v3");
VSET(2, e8, m1);
VCMP_U8(5, v1, 0x49, 0xEE);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0x49, 0xCE);
}

int main(void) {
Expand Down
14 changes: 7 additions & 7 deletions apps/riscv-tests/isa/rv64uv/vmnand.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmnand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0x7B, 0xDE);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmnand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0x32, 0x10);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmnand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0xFF, 0xFF);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmnand.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0xF2, 0x1F);
}

Expand All @@ -48,10 +48,10 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmnand.mm v1, v2, v3");
VSET(2, e8, m1);
VCMP_U8(5, v1, 0x7B, 0xFE);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0x7B, 0xDE);
}

int main(void) {
Expand Down
14 changes: 7 additions & 7 deletions apps/riscv-tests/isa/rv64uv/vmnor.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0x32, 0x10);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0x00, 0x00);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0x32, 0x10);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0x30, 0x00);
}

Expand All @@ -48,10 +48,10 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmnor.mm v1, v2, v3");
VSET(2, e8, m1);
VCMP_U8(5, v1, 0x32, 0xF0);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0x32, 0x10);
}

int main(void) {
Expand Down
12 changes: 6 additions & 6 deletions apps/riscv-tests/isa/rv64uv/vmor.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0xCD, 0xEF);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0xFF, 0xFF);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0xCD, 0xEF);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0xCF, 0xFF);
}

Expand All @@ -48,9 +48,9 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0xCD, 0xEF);
}

Expand Down
12 changes: 6 additions & 6 deletions apps/riscv-tests/isa/rv64uv/vmornot.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmornot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0xFF, 0xFF);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmornot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0xCD, 0xEF);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmornot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0xFF, 0xFF);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmornot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0xFD, 0xEF);
}

Expand All @@ -48,9 +48,9 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmornot.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0xFF, 0xFF);
}

Expand Down
14 changes: 7 additions & 7 deletions apps/riscv-tests/isa/rv64uv/vmxnor.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmxnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0xB6, 0x31);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmxnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0xCD, 0xEF);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmxnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0x32, 0x10);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmxnor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0x3D, 0xE0);
}

Expand All @@ -48,10 +48,10 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmxnor.mm v1, v2, v3");
VSET(2, e8, m1);
VCMP_U8(5, v1, 0xB6, 0xF1);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0xB6, 0x31);
}

int main(void) {
Expand Down
14 changes: 7 additions & 7 deletions apps/riscv-tests/isa/rv64uv/vmxor.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ void TEST_CASE1() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
asm volatile("vmxor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(1, v1, 0x49, 0xCE);
}

Expand All @@ -21,7 +21,7 @@ void TEST_CASE2() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0xFF, 0xFF);
asm volatile("vmxor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(2, v1, 0x32, 0x10);
}

Expand All @@ -30,7 +30,7 @@ void TEST_CASE3() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x00, 0x00);
asm volatile("vmxor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(3, v1, 0xCD, 0xEF);
}

Expand All @@ -39,7 +39,7 @@ void TEST_CASE4() {
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x0F, 0xF0);
asm volatile("vmxor.mm v1, v2, v3");
VSET(2, e8, m1);
VSET(16, e8, m1);
VCMP_U8(4, v1, 0xC2, 0x1F);
}

Expand All @@ -48,10 +48,10 @@ void TEST_CASE5() {
VLOAD_8(v1, 0xFF, 0xFF);
VLOAD_8(v2, 0xCD, 0xEF);
VLOAD_8(v3, 0x84, 0x21);
VSET(13, e8, m1);
VSET(16, e8, m1);
asm volatile("vmxor.mm v1, v2, v3");
VSET(2, e8, m1);
VCMP_U8(5, v1, 0x49, 0xEE);
VSET(16, e8, m1);
VCMP_U8(5, v1, 0x49, 0xCE);
}

int main(void) {
Expand Down

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