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v0.2.0

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@suehtamacv suehtamacv released this 09 Mar 13:28

Added

  • Hardware support for:
    • Bit-shift instructions (vsll, vsrl, vsra)
    • Vector widening integer add/subtract (vwadd, vwaddu, vwsub, vwsubu)
    • Vector integer extension (vzext, vsext)
    • Vector integer merge and move instructions (vmerge, vmv)
    • Vector narrowing integer right shift instructions (vnsrl, vnsra)

Changed

  • Bender updated to version 0.21.0

Fixed

  • CVA6's forwarding mechanism of operand B for accelerator instructions