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[HW]: Add mem_multibanked_pwrgate for correct power management #296

[HW]: Add mem_multibanked_pwrgate for correct power management

[HW]: Add mem_multibanked_pwrgate for correct power management #296

Triggered via push October 28, 2024 09:22
Status Success
Total duration 51s
Artifacts 1

lint.yml

on: push
Verilog Sources
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8 warnings
[verible-verilog-lint] src/mem_multibank_pwrgate.sv#L24: src/mem_multibank_pwrgate.sv#L24
Line length exceeds max: 100; is: 103 [Style: line-length] [line-length]
[verible-verilog-lint] src/mem_multibank_pwrgate.sv#L26: src/mem_multibank_pwrgate.sv#L26
Explicitly define a storage type for every parameter and localparam, (SimInit). [Style: constants] [explicit-parameter-storage-type]
[verible-verilog-lint] src/mem_multibank_pwrgate.sv#L28: src/mem_multibank_pwrgate.sv#L28
Explicitly define a storage type for every parameter and localparam, (ImplKey). [Style: constants] [explicit-parameter-storage-type]
[verible-verilog-lint] src/mem_multibank_pwrgate.sv#L133: src/mem_multibank_pwrgate.sv#L133
Use blocking assignments, at most, for locals inside 'always_ff' sequential blocks. [Style: sequential-logic] [always-ff-non-blocking]
[verible-verilog-lint] src/mem_multibank_pwrgate.sv#L136: src/mem_multibank_pwrgate.sv#L136
Use blocking assignments, at most, for locals inside 'always_ff' sequential blocks. [Style: sequential-logic] [always-ff-non-blocking]
[verible-verilog-lint] src/mem_multibank_pwrgate.sv#L146: src/mem_multibank_pwrgate.sv#L146
All generate block statements must have a label [Style: generate-statements] [generate-label]
[verible-verilog-lint] src/mem_multibank_pwrgate.sv#L151: src/mem_multibank_pwrgate.sv#L151
Line length exceeds max: 100; is: 126 [Style: line-length] [line-length]
Verilog Sources
The following actions use a deprecated Node.js version and will be forced to run on node20: actions/checkout@v3. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/

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verible-linter
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