Skip to content
View raczben's full-sized avatar

Block or report raczben

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. wexpect wexpect Public

    Windows variant of pexpect.

    Python 74 22

  2. fliplot fliplot Public

    HTML & Js based VCD viewer

    JavaScript 59 16

  3. zynq_flash zynq_flash Public

    QSPI flash support for Xilinx's Zynq devices

    C 15 10

  4. tco_study tco_study Public

    Case study of synchronous FPGA signaling by adjusting the output timing

    Tcl 11 2

  5. AXI2SPI-bridge AXI2SPI-bridge Public

    Homework for Rendszerarchitekturak with Feher Béla & Wacha Gabor :)

    Verilog 8 6

  6. pysct pysct Public

    Python wrapper for Xilinx's XSCT/XSDB console

    Python 6 5