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Simple CPU in VHDL designed to run on Basys 3

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SSPPU - Simple CPU in VHDL designed to run on Basys 3

Don't expect quality code. This is what you get if you leave a student with Ben Eater's 8-bit computer series as only previous experience and they learned VHDL by copy-pasting StackOverflow and other random examples from shady, full of ads, websites.

Architecture

Even though it has some differences, the original architecture was inspired by Ben Eater's 8-bit computer which itself is inspired by the SAP-1 (Simple-As-Possible) architecture described in Digital Computer Electronics by Albert Paul Malvino and Jerald A. Brown

Architecture Diagram

Red signals are hardcoded, black ones can be controlled by control signals.

Demos

Bad Apple

It plays Bad Apple : Source Video (YouTube)

YouTube Thumbnail

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Simple CPU in VHDL designed to run on Basys 3

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