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shim-15.5: add riscv64#3

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xypron wants to merge 20 commits intorhboot:shim-15.5rhboot/gnu-efi:shim-15.5from xypron:shim-15.5-riscv64xypron/gnu-efi:shim-15.5-riscv64Copy head branch name to clipboard

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Commits on Aug 24, 2021

• Undefined Status in LibGetVariableAndSize()

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• Initial support for RISCV64

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• lib/hand: missing va_end

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• Fix dummy relocation block alignment

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  mhaeuser

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• ARM: hide 'hidden' pragma for hosted build

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  Ard Biesheuvel

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• lib/hand: missing va_end() in LibReinstallProtocolInterfaces()

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• lib/misc: avoid NULL dereference in LibInsertToTailOfBootOrder

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• efiapi.h: add RISC-V machine type definitions

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  ncroxon

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• riscv64: missing EFI_FUNCTION

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• riscv64: provide efisetjmp_arch.h

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• apps: define FrameBufferAddr for riscv64

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• apps: memory leak in draw_boxes()

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• Fix VS2019 Code Analysis warnings

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  pbatard

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• Set NumberOfSymbols to zero

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  alfonsosanchezbeato

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• riscv64: finalize efibind.h

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• riscv64: provide CHAR8 and CHAR16 (instead of WCHAR)

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• lib: replace va_end by ms_va_end

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• Make.defaults: add riscv64 to ARCHES

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Commits on Sep 30, 2021

• lib/misc: make CopyMem's Src argument IN CONST VOID*

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• Adjust crt0-efi-riscv64.S

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