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@riscv-non-isa

RISC-V Non-ISA Specifications

The Open-Standard Instruction Set Architecture

Welcome to the RISC-V Non-ISA Specifications 👋

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Non-ISA specifications do not add new instructions, create or change opcodes, or in any way modify the RISC-V ISA. They do help us to develop an ecosystem around the ISA Specifications.

Things you'll find here include:

  • ABI Documentation
  • Architecture Tests
  • Specifications like Debug, Processor Trace, and Software Interrupts

If you don't find what you're looking for here, try one of our other GitHub organizations:

Popular repositories Loading

  1. riscv-asm-manual riscv-asm-manual Public

    RISC-V Assembly Programmer's Manual

    Makefile 1.4k 237

  2. riscv-elf-psabi-doc riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    Python 711 163

  3. riscv-arch-test riscv-arch-test Public

    Assembly 516 204

  4. riscv-sbi-doc riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    Makefile 352 91

  5. rvv-intrinsic-doc rvv-intrinsic-doc Public

    C 294 88

  6. riscv-trace-spec riscv-trace-spec Public

    RISC-V Processor Trace Specification

    C 164 47

Repositories

Showing 10 of 35 repositories
  • riscv-toolchain-conventions Public

    Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains

    riscv-non-isa/riscv-toolchain-conventions’s past year of commit activity
    Makefile 144 CC-BY-4.0 35 15 6 Updated Nov 15, 2024
  • riscv-non-isa/riscv-arch-test’s past year of commit activity
    Assembly 516 Apache-2.0 204 61 34 Updated Nov 13, 2024
  • riscv-external-debug-security Public

    The RISC-V External Debug Security Specification

    riscv-non-isa/riscv-external-debug-security’s past year of commit activity
    Makefile 18 CC-BY-4.0 2 2 1 Updated Nov 13, 2024
  • riscv-trace-spec Public

    RISC-V Processor Trace Specification

    riscv-non-isa/riscv-trace-spec’s past year of commit activity
    C 164 CC-BY-4.0 47 20 10 Updated Nov 12, 2024
  • riscv-rpmi Public

    RISC-V Platform Management Interface Specification. OS-agnostic messaging interface for system management and control

    riscv-non-isa/riscv-rpmi’s past year of commit activity
    Makefile 8 CC-BY-4.0 8 0 0 Updated Nov 11, 2024
  • riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    riscv-non-isa/riscv-sbi-doc’s past year of commit activity
    Makefile 352 CC-BY-4.0 91 14 4 Updated Nov 8, 2024
  • riscv-c-api-doc Public

    Documentation of the RISC-V C API

    riscv-non-isa/riscv-c-api-doc’s past year of commit activity
    Makefile 75 CC-BY-4.0 41 17 12 Updated Nov 8, 2024
  • riscv-brs Public

    The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification.

    riscv-non-isa/riscv-brs’s past year of commit activity
    TeX 41 CC-BY-4.0 13 17 2 Updated Nov 8, 2024
  • riscv-non-isa/riscv-semihosting’s past year of commit activity
    Makefile 27 CC-BY-SA-4.0 8 1 0 Updated Nov 8, 2024
  • riscv-acpi-rimt Public

    RISC-V ACPI I/O Mapping Table Specification

    riscv-non-isa/riscv-acpi-rimt’s past year of commit activity
    Makefile 2 CC-BY-4.0 2 0 0 Updated Nov 5, 2024

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