Releases: riscvarchive/riscv-code-size-reduction
v1.0.4-3 add misa.C clarification
Add section defining when to set misa.C
v1.0.4-2
Add rule that C implies Zca, C+F also implies Zcf (RV32), C+D also implies Zcd
v1.0.4-1
Clarification that Zcf implies F and Zcd implies D
Clarification that Zcf is RV32 only
v1.0
This release was created by: rpsene
This extension is Ratified. No changes are allowed. Any desired or needed changes can be the subject of a follow-on new extension. Ratified extensions are never revised. See https://riscv.org/spec-state.
Zc* is a group of extensions which define subsets of the existing C extension (Zca, Zcd, Zcf) and new extensions which only contain 16-bit encodings.
Zcm* all reuse the encodings for c.fld, c.fsd, c.fldsp, c.fsdsp.
Non-normative clarification regarding non-idempotent memory
v1.0.3-1 v1.0.3-1 non-normative non-idempotent memory clarification
v1.0.3 add defintion of Zce
v1.0.3 add definition of Zce
v1.0.2-1 ratification ready
make register field names consistent for c.mul, c.not, c.zext.b
v1.0.2 ratification ready
Updated instruction formats following Architecture Review Committee feedback
v1.0.1 Post public review fixes
v1.0.1 - post public review fixes
PUBLIC REVIEW REVISION v1.0.0-RC5.7
public review revision, v1.0.0-RC5.7 (more consistent version number)