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Basic support for riscv (eurecom-s3#42)
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* Basic support for riscv
* Add build of SymQEMU for Risc-V in Dockerfile

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Co-authored-by: Vlada Logunova <[email protected]>
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2 people authored and rmalmain committed Mar 20, 2024
1 parent 000b931 commit a1ccff8
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Showing 3 changed files with 10 additions and 1 deletion.
2 changes: 1 addition & 1 deletion Dockerfile
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ RUN ./configure \
--disable-opengl \
--disable-virglrenderer \
--disable-werror \
--target-list=x86_64-linux-user \
--target-list=x86_64-linux-user,riscv64-linux-user \
--enable-debug \
--symcc-source=/symcc \
--symcc-build=/symcc/build
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7 changes: 7 additions & 0 deletions target/riscv/cpu.c
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Expand Up @@ -37,6 +37,9 @@
#include "tcg/tcg-cpu.h"
#include "tcg/tcg.h"

#define SymExpr void*
#include "RuntimeCommon.h"

/* RISC-V CPU definitions */
static const char riscv_single_letter_exts[] = "IEMAFDQCPVH";
const uint32_t misa_bits[] = {RVI, RVE, RVM, RVA, RVF, RVD, RVV,
Expand Down Expand Up @@ -1213,6 +1216,10 @@ static void riscv_cpu_post_init(Object *obj)

static void riscv_cpu_init(Object *obj)
{
RISCVCPU *cpu = RISCV_CPU(obj);
memset(cpu->env_exprs, 0, sizeof(cpu->env_exprs));
_sym_register_expression_region(cpu->env_exprs, sizeof(cpu->env_exprs));

#ifndef CONFIG_USER_ONLY
qdev_init_gpio_in(DEVICE(obj), riscv_cpu_set_irq,
IRQ_LOCAL_MAX + IRQ_LOCAL_GUEST_MAX);
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2 changes: 2 additions & 0 deletions target/riscv/cpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -424,6 +424,8 @@ struct ArchCPU {
CPUState parent_obj;

CPURISCVState env;
/* space for symbolic expressions corresponding to env */
void *env_exprs[512 + 1]; /* TCG_MAX_TEMPS + 1 (for NULL) */

char *dyn_csr_xml;
char *dyn_vreg_xml;
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