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Merge #375
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375: Prepare v0.7.4 r=thejpster a=adamgreig

I've created a new branch, `v0.7.x`, which is currently at the latest non-breaking commit (so includes #346 #349 #347 #351 #339 #352 #348 #363 #362 #361 but does not include #342), to track the 0.7 series since master now contains breaking changes for v0.8.

This PR (which targets the new branch) cherry-picks #372 #369 #374 and bumps the version to v0.7.4 (and updates CHANGELOG) ready for a new v0.7.4 release. Once complete I'll also backport the changelog entries and bump the version in master to 0.7.4.

I think this is everything that should be in 0.7 -- the only excluded PRs from master are #342 and #367 I believe, and I don't think we have any open PRs targeting 0.7 either.

Any other thoughts on items for inclusion in 0.7.4 (or other changelog entries I missed)?

Co-authored-by: bors[bot] <26634292+bors[bot]@users.noreply.github.com>
Co-authored-by: Adam Greig <[email protected]>
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bors[bot] and adamgreig authored Jan 2, 2022
2 parents 4b53689 + e62dee6 commit 2e2cb78
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19 changes: 17 additions & 2 deletions CHANGELOG.md
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Expand Up @@ -7,15 +7,29 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

## [Unreleased]

## [v0.7.4] - 2021-12-31

### Added

- Added support for additional DWT counters (#349)
- CPI counter
- Exception overhead counter
- LSU counter
- Folded-instruction counter
- Added `DWT.set_cycle_count` (#347).
- Added support for the Cortex-M7 TCM and cache access control registers.
There is a feature `cm7` to enable access to these.
There is a feature `cm7` to enable access to these (#352).
- Add derives for serde, Hash, and PartialOrd to VectActive behind feature
gates for host-platform use (#363).
- Support host platforms besides x86_64 (#369).
- Added `delay::Delay::with_source`, a constructor that lets you specify
the SysTick clock source (#374).

### Fixed

- Fix incorrect AIRCR PRIGROUP mask (#338, #339).
- Fix nightly users of inline-asm breaking now that the asm macro is removed
from the prelude (#372).

### Deprecated

Expand Down Expand Up @@ -717,7 +731,8 @@ fn main() {
- Functions to get the vector table
- Wrappers over miscellaneous instructions like `bkpt`

[Unreleased]: https://github.com/rust-embedded/cortex-m/compare/v0.7.3...HEAD
[Unreleased]: https://github.com/rust-embedded/cortex-m/compare/v0.7.4...HEAD
[v0.7.4]: https://github.com/rust-embedded/cortex-m/compare/v0.7.3...v0.7.4
[v0.7.3]: https://github.com/rust-embedded/cortex-m/compare/v0.7.2...v0.7.3
[v0.7.2]: https://github.com/rust-embedded/cortex-m/compare/v0.7.1...v0.7.2
[v0.7.1]: https://github.com/rust-embedded/cortex-m/compare/v0.7.0...v0.7.1
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4 changes: 2 additions & 2 deletions Cargo.toml
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Expand Up @@ -11,7 +11,7 @@ license = "MIT OR Apache-2.0"
name = "cortex-m"
readme = "README.md"
repository = "https://github.com/rust-embedded/cortex-m"
version = "0.7.3"
version = "0.7.4"
edition = "2018"
links = "cortex-m" # prevent multiple versions of this crate to be linked together

Expand All @@ -31,7 +31,7 @@ cm7 = []
cm7-r0p1 = ["cm7"]
inline-asm = []
linker-plugin-lto = []
std-map = []
std = []

[workspace]
members = ["xtask", "cortex-m-semihosting", "panic-semihosting", "panic-itm"]
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2 changes: 1 addition & 1 deletion asm-toolchain
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@@ -1 +1 @@
nightly-2020-08-26
nightly-2021-12-16
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