Disable NEON intrinsics on big-endian ARM

These are currently broken because the order of elements inside
vectors is reversed on big-endian systems: the ARM ABI requires that
element 0 is located at the highest address of the vector type. However
LLVM intrinsics expect element 0 to be located at the lowest address.

See https://llvm.org/docs/BigEndianNEON.html and `arm_neon.h` in
Clang for more details.

Although this is a breaking change, this is acceptable for 2 reasons:
- big endian ARM targets are only tier 3.
- it is preferable to stop existing code from compiling than to let it
run and produce incorrect results.

crates/core_arch/src/aarch64/mod.rs

@@ -6,7 +6,10 @@
 //! [arm_ref]: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0073a/IHI0073A_arm_neon_intrinsics_ref.pdf
 //! [arm_dat]: https://developer.arm.com/technologies/neon/intrinsics
 
+// NEON intrinsics are currently broken on big-endian, so don't expose them. (#1484)
+#[cfg(target_endian = "little")]
 mod neon;
+#[cfg(target_endian = "little")]
 pub use self::neon::*;
 
 mod tme;