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gpio: show raw inner implementation Padv1 and Padv2 structures
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Code cleanup

Signed-off-by: Zhouqi Jiang <[email protected]>
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luojia65 committed Dec 19, 2024
1 parent c9d8eaf commit 130f5b9
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Showing 2 changed files with 16 additions and 18 deletions.
10 changes: 4 additions & 6 deletions bouffalo-hal/src/gpio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,8 @@
//! GPIO pin structure has an alternate mode parameter `M`. Alternate modes can be
//! switched by using functions begin with `into_`. Those functions internally operate
//! on hardware (specifically, GLB peripheral) to change pin function, and convert this
//! structure to `Pin` type with different alternate mode generic parameters. With new
//! alternate mode types, `Pin` structure would now match the demand of creating new
//! structure to `Pad` type with different alternate mode generic parameters. With new
//! alternate mode types, `Pad` structure would now match the demand of creating new
//! peripheral structures, or include specific functions for developers to use.
//!
//! # Examples
Expand Down Expand Up @@ -130,13 +130,11 @@ mod pad_v1;
mod pad_v2;
mod typestate;

pub use alternate::Alternate;
pub use convert::{IntoPad, IntoPadv2};
pub use disabled::Disabled;
pub use gpio_group::Pads;
pub use input::Input;
pub use output::Output;
pub use typestate::*;
pub use {alternate::Alternate, disabled::Disabled, input::Input, output::Output};
pub use {pad_v1::Padv1, pad_v2::Padv2};

cfg_if::cfg_if! {
if #[cfg(feature = "glb-v1")] {
Expand Down
24 changes: 12 additions & 12 deletions bouffalo-hal/src/gpio/convert.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ use super::{
alternate::Alternate,
input::Input,
output::Output,
typestate::{Floating, PullDown, PullUp},
typestate::{self, Floating, PullDown, PullUp},
};

/// Trait for pad mode conversations.
Expand All @@ -24,25 +24,25 @@ pub trait IntoPad<GLB, const N: usize> {
/// Trait for GLBv2 pad mode conversations.
pub trait IntoPadv2<GLB, const N: usize> {
/// Configures the pin to operate as a SPI pin.
fn into_spi<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Spi<I>>;
fn into_spi<const I: usize>(self) -> Alternate<GLB, N, typestate::Spi<I>>;
/// Configures the pin to operate as a SDH pin.
fn into_sdh(self) -> Alternate<GLB, N, super::typestate::Sdh>;
fn into_sdh(self) -> Alternate<GLB, N, typestate::Sdh>;
/// Configures the pin to operate as UART signal.
fn into_uart(self) -> Alternate<GLB, N, super::typestate::Uart>;
fn into_uart(self) -> Alternate<GLB, N, typestate::Uart>;
/// Configures the pin to operate as multi-media cluster UART signal.
fn into_mm_uart(self) -> Alternate<GLB, N, super::typestate::MmUart>;
fn into_mm_uart(self) -> Alternate<GLB, N, typestate::MmUart>;
/// Configures the pin to operate as a pull up Pulse Width Modulation signal pin.
fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Pwm<I>>;
fn into_pull_up_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>>;
/// Configures the pin to operate as a pull down Pulse Width Modulation signal pin.
fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Pwm<I>>;
fn into_pull_down_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>>;
/// Configures the pin to operate as floating Pulse Width Modulation signal pin.
fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, super::typestate::Pwm<I>>;
fn into_floating_pwm<const I: usize>(self) -> Alternate<GLB, N, typestate::Pwm<I>>;
/// Configures the pin to operate as an Inter-Integrated Circuit signal pin.
fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, super::typestate::I2c<I>>;
fn into_i2c<const I: usize>(self) -> Alternate<GLB, N, typestate::I2c<I>>;
/// Configures the pin to operate as D0 core JTAG.
fn into_jtag_d0(self) -> Alternate<GLB, N, super::typestate::JtagD0>;
fn into_jtag_d0(self) -> Alternate<GLB, N, typestate::JtagD0>;
/// Configures the pin to operate as M0 core JTAG.
fn into_jtag_m0(self) -> Alternate<GLB, N, super::typestate::JtagM0>;
fn into_jtag_m0(self) -> Alternate<GLB, N, typestate::JtagM0>;
/// Configures the pin to operate as LP core JTAG.
fn into_jtag_lp(self) -> Alternate<GLB, N, super::typestate::JtagLp>;
fn into_jtag_lp(self) -> Alternate<GLB, N, typestate::JtagLp>;
}

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