Skip to content

Commit

Permalink
Update tracked files on ui branch
Browse files Browse the repository at this point in the history
  • Loading branch information
jigglypuff96 committed Nov 22, 2024
1 parent 70cf961 commit 487434c
Show file tree
Hide file tree
Showing 11 changed files with 726 additions and 493 deletions.
912 changes: 433 additions & 479 deletions .vscode/launch.json

Large diffs are not rendered by default.

2 changes: 2 additions & 0 deletions driver/driver.go
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@ import (
"reflect"
"runtime/debug"
"sync"
"fmt"

"github.com/rs/xid"
"github.com/sarchlab/akita/v3/mem/mem"
Expand Down Expand Up @@ -85,6 +86,7 @@ func (d *Driver) logSimulationStart() {
}

func (d *Driver) logSimulationTerminate() {
fmt.Printf("logSimulationTerminate 3333\n")
tracing.EndTask(d.simulationID, d)
}

Expand Down
14 changes: 14 additions & 0 deletions driver/mock_sim_test.go

Some generated files are not rendered by default. Learn more about how customized files appear on GitHub.

3 changes: 1 addition & 2 deletions go.mod
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,6 @@ require (
)

// replace github.com/syifan/goseth => ../goseth

// replace github.com/sarchlab/akita/v3 => ../akita
replace github.com/sarchlab/akita/v3 => ../akita

go 1.20
13 changes: 13 additions & 0 deletions samples/runner/dramtracer.go
Original file line number Diff line number Diff line change
Expand Up @@ -75,3 +75,16 @@ func (t *dramTracer) EndTask(task tracing.Task) {

delete(t.inflightTasks, task.ID)
}

// DelayTask does nothing
func (t *dramTracer) DelayTask(delayEvent tracing.DelayEvent) {
// Do nothing
}
// ProgressTask does nothing
func (t *dramTracer) ProgressTask(progressEvent tracing.ProgressEvent) {
// Do nothing
}
// DependencyTask does nothing
func (t *dramTracer) DependencyTask(event tracing.DependencyEvent) {
// Do nothing
}
13 changes: 13 additions & 0 deletions samples/runner/insttracer.go
Original file line number Diff line number Diff line change
Expand Up @@ -69,3 +69,16 @@ func (t *instTracer) EndTask(task tracing.Task) {
atexit.Exit(0)
}
}

// DelayTask does nothing
func (t *instTracer) DelayTask(delayEvent tracing.DelayEvent) {
// Do nothing
}
// ProgressTask does nothing
func (t *instTracer) ProgressTask(progressEvent tracing.ProgressEvent) {
// Do nothing
}
// DependencyTask does nothing
func (t *instTracer) DependencyTask(event tracing.DependencyEvent) {
// Do nothing
}
12 changes: 12 additions & 0 deletions timing/cu/cpistacktracer.go
Original file line number Diff line number Diff line change
Expand Up @@ -233,6 +233,18 @@ func (h *CPIStackTracer) EndTask(task tracing.Task) {
}
}

// DelayTask does nothing
func (t *CPIStackTracer) DelayTask(delayEvent tracing.DelayEvent) {
// Do nothing
}
// ProgressTask does nothing
func (t *CPIStackTracer) ProgressTask(progressEvent tracing.ProgressEvent) {
// Do nothing
}
// DependencyTask does nothing
func (t *CPIStackTracer) DependencyTask(event tracing.DependencyEvent) {
// Do nothing
}
func (h *CPIStackTracer) handleTaskStart(task tracing.Task) {
switch task.Kind {
case "wavefront":
Expand Down
15 changes: 15 additions & 0 deletions timing/cu/insttracer.go
Original file line number Diff line number Diff line change
Expand Up @@ -155,6 +155,21 @@ func (t *InstTracer) EndTask(task tracing.Task) {
delete(t.inflightInsts, task.ID)
}

// DelayTask does nothing
func (t *InstTracer) DelayTask(delayEvent tracing.DelayEvent) {
// Do nothing
}

// ProgressTask does nothing
func (t *InstTracer) ProgressTask(progressEvent tracing.ProgressEvent) {
// Do nothing
}

// DependencyTask does nothing
func (t *InstTracer) DependencyTask(event tracing.DependencyEvent) {
// Do nothing
}

// calcTotalTime calculates the total time for the instructions to execute
func (t *InstTracer) calcTotalTime(currentEndTime float64) {
t.TimeManager.TotalTime = currentEndTime - t.TimeManager.firstInstStart
Expand Down
15 changes: 15 additions & 0 deletions timing/cu/isa_debugger.go
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,21 @@ func (h *ISADebugger) EndTask(task tracing.Task) {
delete(h.executingInst, task.ID)
}

// DelayTask does nothing
func (t *ISADebugger) DelayTask(delayEvent tracing.DelayEvent) {
// Do nothing
}

// ProgressTask does nothing
func (t *ISADebugger) ProgressTask(progressEvent tracing.ProgressEvent) {
// Do nothing
}

// DependencyTask does nothing
func (t *ISADebugger) DependencyTask(event tracing.DependencyEvent) {
// Do nothing
}

func (h *ISADebugger) logWholeWf(
inst *insts.Inst,
wf *wavefront.Wavefront,
Expand Down
70 changes: 69 additions & 1 deletion timing/rdma/comp.go
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
package rdma

import (
"fmt"
"log"
"reflect"

Expand Down Expand Up @@ -40,6 +41,16 @@ type Comp struct {
transactionsFromInside []transaction
}

func extractIDs(bufferElements []interface{}) []string {
ids := []string{}
for _, elem := range bufferElements {
if req, ok := elem.(*mem.ReadReq); ok {
ids = append(ids, req.MsgMeta.ID)
}
}
return ids
}

// SetLocalModuleFinder sets the table to lookup for local data.
func (c *Comp) SetLocalModuleFinder(lmf mem.LowModuleFinder) {
c.localModules = lmf
Expand All @@ -63,6 +74,8 @@ func (c *Comp) Tick(now sim.VTimeInSec) bool {
func (c *Comp) processFromCtrlPort(now sim.VTimeInSec) bool {
req := c.CtrlPort.Peek()
if req == nil {
tracing.TraceDelay(nil, c, c.CtrlPort.Name(), now, "Delay", "idle", "rdma/comp")
fmt.Printf("Delay, no available ctrl port: %.20f\n", now)
return false
}

Expand All @@ -72,10 +85,18 @@ func (c *Comp) processFromCtrlPort(now sim.VTimeInSec) bool {
c.currentDrainReq = req
c.isDraining = true
c.pauseIncomingReqsFromL1 = true
// tracing.TraceDelay(req, c, c.CtrlPort.Name(), now, "Step", "", "rdma/comp")
transactionProgressID := sim.GetIDGenerator().Generate();
tracing.TraceProgress(transactionProgressID, req.Meta().ID, c, now, "rdma/comp", "Port not available")
dependentIDs := extractIDs(c.CtrlPort.GetAllBufferElements());
tracing.TraceDependency(transactionProgressID, c, dependentIDs)

return true
case *RestartReq:
return c.processRDMARestartReq(now)
default:
delayReason := fmt.Sprintf("cannot process request of type %s", reflect.TypeOf(req))
tracing.TraceDelay(req, c, c.CtrlPort.Name(), now, "Delay", delayReason, "rdma/comp")
log.Panicf("cannot process request of type %s", reflect.TypeOf(req))
return false
}
Expand All @@ -90,11 +111,18 @@ func (c *Comp) processRDMARestartReq(now sim.VTimeInSec) bool {
err := c.CtrlPort.Send(restartCompleteRsp)

if err != nil {
fmt.Printf("Delay, fail to send ctrl port: %.20f\n", now)
return false
}
c.currentDrainReq = nil
c.pauseIncomingReqsFromL1 = false

// tracing.TraceDelay(restartCompleteRsp, c, c.CtrlPort.Name(), now, "Step", "", "rdma/comp")
transactionProgressID := sim.GetIDGenerator().Generate();
tracing.TraceProgress(transactionProgressID, restartCompleteRsp.Meta().ID, c, now, "rdma/comp", "Port network not available")
dependentIDs := extractIDs(c.CtrlPort.GetAllBufferElements());
tracing.TraceDependency(transactionProgressID, c, dependentIDs)

return true
}

Expand All @@ -108,11 +136,19 @@ func (c *Comp) drainRDMA(now sim.VTimeInSec) bool {

err := c.CtrlPort.Send(drainCompleteRsp)
if err != nil {
tracing.TraceDelay(drainCompleteRsp, c, c.CtrlPort.Name(), now, "Delay", "Port network not available", "rdma/comp")
fmt.Printf("Delay, fail to send ctrl port: %.20f\n", now)
return false
}
c.isDraining = false
// tracing.TraceDelay(drainCompleteRsp, c, c.CtrlPort.Name(), now, "Step", "", "rdma/comp")
transactionProgressID := sim.GetIDGenerator().Generate();
tracing.TraceProgress(transactionProgressID, drainCompleteRsp.Meta().ID, c, now, "rdma/comp","Port network not available")
dependentIDs := extractIDs(c.CtrlPort.GetAllBufferElements());
tracing.TraceDependency(transactionProgressID, c, dependentIDs)
return true
}
tracing.TraceDelay(nil, c, c.CtrlPort.Name(), now, "Delay", "RDMA not fully drained", "rdma/comp")
return false
}

Expand All @@ -123,26 +159,38 @@ func (c *Comp) fullyDrained() bool {

func (c *Comp) processFromL1(now sim.VTimeInSec) bool {
if c.pauseIncomingReqsFromL1 {
fmt.Printf("Delay, pauseIncomingReqsFromL1: %.20f\n", now)
return false
}

madeProgress := false
for {
req := c.ToL1.Peek()
if req == nil {
tracing.TraceDelay(req, c, c.ToL1.Name(), now, "Delay", "data not available", "rdma/comp")
fmt.Printf("Delay, no available ToL1 port: %.20f\n", now)
return madeProgress
}

switch req := req.(type) {
case mem.AccessReq:
ret := c.processReqFromL1(now, req)
if !ret {
fmt.Printf("Delay, no available ToL1 port: %.20f\n", now)
tracing.TraceDelay(req, c, c.ToL1.Name(), now, "Delay", "Resources/storage not available", "rdma/comp")
return madeProgress
}
// tracing.TraceDelay(req, c, c.ToL1.Name(), now, "Step", "", "rdma/comp")
transactionProgressID := sim.GetIDGenerator().Generate();
tracing.TraceProgress(transactionProgressID, req.Meta().ID, c, now, "rdma/comp", "Resources/storage not available")
dependentIDs := extractIDs(c.ToL1.GetAllBufferElements());
tracing.TraceDependency(transactionProgressID, c, dependentIDs)

madeProgress = true
default:
log.Panicf("cannot process request of type %s", reflect.TypeOf(req))
delayReason := fmt.Sprintf("cannot process request of type %s", reflect.TypeOf(req))
tracing.TraceDelay(req, c, c.ToL1.Name(), now, "Delay", delayReason, "rdma/comp")
fmt.Printf("Delay, no available ToL1 port: %.20f\n", now)
return false
}
}
Expand All @@ -153,14 +201,21 @@ func (c *Comp) processFromL2(now sim.VTimeInSec) bool {
for {
req := c.ToL2.Peek()
if req == nil {
tracing.TraceDelay(req, c, c.ToL2.Name(), now, "Delay", "data not available", "rdma/comp")
return madeProgress
}
switch req := req.(type) {
case mem.AccessRsp:
ret := c.processRspFromL2(now, req)
if !ret {
tracing.TraceDelay(req, c, c.ToL2.Name(), now, "Delay", "Resources/storage not available", "rdma/comp")
return madeProgress
}
// tracing.TraceDelay(req, c, c.ToL2.Name(), now, "Step", "", "rdma/comp")
transactionProgressID := sim.GetIDGenerator().Generate();
tracing.TraceProgress(transactionProgressID, req.Meta().ID, c, now, "rdma/comp","Resources/storage not available")
dependentIDs := extractIDs(c.ToL2.GetAllBufferElements());
tracing.TraceDependency(transactionProgressID, c, dependentIDs)
madeProgress = true
default:
panic("unknown req type")
Expand All @@ -173,20 +228,33 @@ func (c *Comp) processFromOutside(now sim.VTimeInSec) bool {
for {
req := c.ToOutside.Peek()
if req == nil {
tracing.TraceDelay(req, c, c.ToOutside.Name(), now, "Delay", "data not available", "rdma/comp")
return madeProgress
}
switch req := req.(type) {
case mem.AccessReq:
ret := c.processReqFromOutside(now, req)
if !ret {
tracing.TraceDelay(req, c, c.ToOutside.Name(), now, "Delay", "Resources/storage not available", "rdma/comp")
return madeProgress
}
// tracing.TraceDelay(req, c, c.ToOutside.Name(), now, "Step", "", "rdma/comp")
transactionProgressID := sim.GetIDGenerator().Generate();
tracing.TraceProgress(transactionProgressID, req.Meta().ID, c, now, "rdma/comp","Resources/storage not available")
dependentIDs := extractIDs(c.ToOutside.GetAllBufferElements());
tracing.TraceDependency(transactionProgressID, c, dependentIDs)
madeProgress = true
case mem.AccessRsp:
ret := c.processRspFromOutside(now, req)
if !ret {
tracing.TraceDelay(req, c, c.ToOutside.Name(), now, "Delay", "Resources/storage not available", "rdma/comp")
return madeProgress
}
// tracing.TraceDelay(req, c, c.ToOutside.Name(), now, "Step", "", "rdma/comp")
transactionProgressID := sim.GetIDGenerator().Generate();
tracing.TraceProgress(transactionProgressID, req.Meta().ID, c, now, "rdma/comp","Resources/storage not available")
dependentIDs := extractIDs(c.ToOutside.GetAllBufferElements());
tracing.TraceDependency(transactionProgressID, c, dependentIDs)
madeProgress = true
default:
log.Panicf("cannot process request of type %s", reflect.TypeOf(req))
Expand Down
Loading

0 comments on commit 487434c

Please sign in to comment.