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syscall lint and fix
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lispc committed Sep 23, 2024
1 parent e9684f0 commit 768a3e4
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Showing 2 changed files with 14 additions and 4 deletions.
10 changes: 6 additions & 4 deletions crates/core/executor/src/events/precompiles/bn254_scalar.rs
Original file line number Diff line number Diff line change
Expand Up @@ -58,20 +58,21 @@ pub fn create_bn254_scalar_arith_event(
let p_ptr = arg1;
let q_ptr = arg2;

assert_eq!(p_ptr % 4, 0, "p_ptr({:x}) is not aligned", p_ptr);
assert_eq!(q_ptr % 4, 0, "q_ptr({:x}) is not aligned", q_ptr);
assert_eq!(p_ptr % 4, 0, "p_ptr({p_ptr:x}) is not aligned");
assert_eq!(q_ptr % 4, 0, "q_ptr({q_ptr:x}) is not aligned");

let nw_per_fe = <Bn254ScalarField as NumWords>::WordsFieldElement::USIZE;
debug_assert_eq!(nw_per_fe, NUM_WORDS_PER_FE);

let arg1: Vec<u32> = rt.slice_unsafe(p_ptr, nw_per_fe);
let arg2 = match op {
// 2 ptrs of real U256 values
Bn254FieldOperation::Mac => FieldArithMemoryAccess::read(rt, arg2, 2),
_ => FieldArithMemoryAccess::read(rt, arg2, nw_per_fe),
};

let bn_arg1 = BigUint::from_bytes_le(
&arg1.iter().copied().flat_map(|word| word.to_le_bytes()).collect::<Vec<u8>>(),
&arg1.iter().copied().flat_map(u32::to_le_bytes).collect::<Vec<u8>>(),
);
let modulus = Bn254ScalarField::modulus();

Expand Down Expand Up @@ -104,6 +105,7 @@ pub fn create_bn254_scalar_arith_event(
a,
b
);
rt.clk += 1;

let mut result_words = bn_arg1_out.to_u32_digits();
result_words.resize(nw_per_fe, 0);
Expand Down Expand Up @@ -149,7 +151,7 @@ impl FieldArithMemoryAccess<MemoryReadRecord> {

impl FieldArithMemoryAccess<MemoryWriteRecord> {
pub fn write(rt: &mut SyscallContext, ptr: u32, values: &[u32]) -> Self {
Self { ptr, memory_records: rt.mw_slice(ptr, &values) }
Self { ptr, memory_records: rt.mw_slice(ptr, values) }
}

pub fn prev_value_as_biguint(&self) -> BigUint {
Expand Down
8 changes: 8 additions & 0 deletions crates/core/executor/src/syscalls/precompiles/memcopy.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,10 @@ impl<NumWords: ArrayLength + Send + Sync, NumBytes: ArrayLength + Send + Sync> S
dst: u32,
) -> Option<u32> {
let (read, read_bytes) = rt.mr_slice(src, NumWords::USIZE);

// dst == src is supported, even it is actually a no-op.
rt.clk += 1;

let write = rt.mw_slice(dst, &read_bytes);

let event = MemCopyEvent {
Expand All @@ -51,4 +55,8 @@ impl<NumWords: ArrayLength + Send + Sync, NumBytes: ArrayLength + Send + Sync> S

None
}

fn num_extra_cycles(&self) -> u32 {
1
}
}

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