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\caption{Differences in SystemVerilog Support in DC vs. Synplify-Pro [ref]} | ||
\includegraphics[width=\linewidth]{figures/dc_vs_synplify.pdf} | ||
\label{fig:dc_vs_synplify} |
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\chapter{Introduction} | ||
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Words | ||
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Words2 | ||
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\begin{section}{Permissions and Attributions} | ||
\begin{enumerate} | ||
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\item The content of chapter 2 and appendix A is the result of a collaboration with Alice and Bob, and has previously appeared in the (Journal) (paper citation). It is reproduced here with the permission of (Institution): \url{http://}. | ||
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\end{enumerate} | ||
\end{section} |
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\chapter{Chapter 2 Title} | ||
%--- Section ------------------------- | ||
\begin{section}{Section Title} | ||
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Lorem ipsum dolor sit amet, consectetur adipiscing elit. Mauris et neque massa. Fusce sit amet orci libero. Morbi venenatis quam ante, in vehicula diam. Cras in dui sem, et fermentum ligula. Sed sed tellus ut purus semper pharetra euismod nec tellus. Nullam tortor justo, tincidunt sed varius vel, rhoncus id ipsum. Sed ipsum sem, bibendum id posuere sit amet, dignissim vel odio. Integer pretium mattis metus eu porta. Sed luctus, eros eu feugiat euismod, nulla augue fringilla nisi, sed gravida sem orci ac urna. | ||
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\end{section} |
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\chapter{Chapter 3 Title} | ||
%--- Introduction ------------------------- | ||
\begin{section}{Section Title} | ||
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\cite{Maldacena:1997re,joesbook}. Figure \ref{fig:dc_vs_synplify}. | ||
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\begin{figure}[t] | ||
\input{figures/dc_vs_synplify.tex} | ||
\end{figure} | ||
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\end{section} |
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\appendix | ||
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\dsp | ||
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\chapter{Appendix Title }{\label{appendix:a}} | ||
\begin{section}{Section Title} | ||
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Appendicitis | ||
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\end{section} |
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\ssp | ||
\bibliographystyle{JHEP3} | ||
\bibliography{thesis} |
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