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Merge pull request #29 from siliconcompiler/readme_update
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Adding description to README
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aolofsson authored Nov 30, 2023
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2 changes: 1 addition & 1 deletion LICENSE
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MIT License

Copyright (c) 2023 Zero ASIC
Copyright (c) 2023 Zero ASIC Corporation

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

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19 changes: 17 additions & 2 deletions README.md
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# lambdalib
# Lambdalib Introduction

Standardized ASIC design libraries
Lambdalib is a modular hardware abstraction layer that helps decouple hardware design from manufacturing technology and proprietary IP. Lambdalib defines a set of standardized interfaces that are used to instantiate generic cells within a design. Technology specific modules that conform to the Lambdalib interfaces can then be linked at compiler time.

Lambdalib includes the following hardware categories:

| Category | Description|
|---------------------------|------------|
|[stdlib](stdlib/rtl) | Standard cells (inv, nand, ff, ...)
|[ramlib](ramlib/rtl) | Memory (single port, dual port, fifo, ...)
|[iolib](iolib/rtl) | IO cells (bidir, vdd, clamp,...)
|[padring](padring/rtl) | Padring generator
|[vectorlib](vectorlib/rtl) | Vectorized helper library (mux, isolation)
|[syslib](syslib/rtl) | Vendor agnostic peripheral interface(uart, i2c,...)

The [Lambdapdk](https://github.com/siliconcompiler/lambdapdk) repository demonstrates implementation of the Lambdalib interfaces across a number of open source process technologies.

Lambdalib has successfully used in multiple tapeouts using [SiliconCompiler](https://github.com/siliconcompiler/siliconcompiler).

# License

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