Moving alias module to padring

siliconcompiler · Jul 28, 2024 · 8a5ea17 · 8a5ea17
1 parent 373ef46
commit 8a5ea17
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Showing 2 changed files with 7 additions and 7 deletions.
diff --git a/lambdalib/iolib/rtl/la_pt.v → lambdalib/padring/rtl/la_ioalias.v b/lambdalib/iolib/rtl/la_pt.v → lambdalib/padring/rtl/la_ioalias.v
@@ -1,6 +1,6 @@
 
 /**************************************************************************
- * Function: IO Alias Module
+ * Function: IO Alias Utility Module
  * Copyright: Lambda Project Authors. All rights Reserved.
  * License:  MIT (see LICENSE file in Lambda repository)
  *
@@ -17,8 +17,8 @@
  *
  *************************************************************************/
 
-module la_pt (.io1(a),
-              .io2(a));
+module la_ioalias (.io1(a),
+                   .io2(a));
 
    inout wire a;
 

diff --git a/lambdalib/iolib/rtl/la_ioshort.v → lambdalib/padring/rtl/la_ioshort.v b/lambdalib/iolib/rtl/la_ioshort.v → lambdalib/padring/rtl/la_ioshort.v
@@ -1,18 +1,18 @@
-/*****************************************************************************
+/**************************************************************************
  * Function: Simulation Friendly IO Alias Module
  * Copyright: Lambda Project Authors. All rights Reserved.
  * License:  MIT (see LICENSE file in Lambda repository)
  *
  * Docs:
  *
- * Instantiates the la_pt inout alias module and adds a loop breaking
+ * Instantiates the la_ioalias inout alias module and adds a loop breaking
  * logic for some tools that don's support tran, alias,and port aliasing.
  *
  * WARNING: The port list alias features is in the verilog standard,
  * but not well supported by open source tools. Not recommended for
  * portable designs.
  *
- ****************************************************************************/
+ *************************************************************************/
 module la_ioshort (inout a,
                    inout b,
                    input a2b
@@ -24,7 +24,7 @@ module la_ioshort (inout a,
    assign b = a2b ? a : 1'bz;
 `else
     // verilog_lint: waive-start module-port
-    la_pt la_pt (a,b);
+    la_pt la_ioalias (a,b);
     // verilog_lint: waive-end module-port
 `endif