licheea53nano: sync

sipeed · Mar 26, 2024 · 686c7cb · 686c7cb
1 parent 5e4c168
commit 686c7cb
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Showing 5 changed files with 40 additions and 19 deletions.
diff --git a/build/boards/sg200x/sg2002_licheea53nano_sd/dts_arm/sg2002_licheea53nano_sd.dts b/build/boards/sg200x/sg2002_licheea53nano_sd/dts_arm/sg2002_licheea53nano_sd.dts
@@ -34,22 +34,24 @@
 &cvi_vo {
 #ifndef __UBOOT__
 	/delete-property/ reset-gpio;
+	/delete-property/ pwm-gpio;
 #else
 	// for uboot
         reset-gpio = <&porte 0 1>;
+        pwm-gpio = <&porte 2 1>;
 #endif
-        /delete-property/ pwm-gpio;
         /delete-property/ power-ct-gpio;
 
 };
 
 &mipi_tx {
-        /delete-property/ pwm-gpio;
 #ifndef __UBOOT__
 	// for linux kernel
         reset-gpio = <&porte 0 1>;
+        pwm-gpio = <&porte 2 1>;
 #else
         /delete-property/ reset-gpio;
+        /delete-property/ pwm-gpio;
 #endif
         /delete-property/ power-ct-gpio;
         status = "okay";
@@ -146,6 +148,13 @@
 		};
 	};
 
+	lcd0_backlight: pwm-backlight@0 {
+		compatible = "pwm-backlight";
+		pwms = <&pwm2 2 50000000>; // 20Khz
+		brightness-levels = <0 2 4 8 16 32 64 128 255>;
+		default-brightness-level = <4>;
+	};
+
         wifisd:wifi-sd@4320000 {                                                    
                 compatible = "cvitek,cv181x-sdio";                                  
                 bus-width = <4>;                                                    

diff --git a/build/boards/sg200x/sg2002_licheea53nano_sd/linux/sg2002_licheea53nano_sd_defconfig b/build/boards/sg200x/sg2002_licheea53nano_sd/linux/sg2002_licheea53nano_sd_defconfig
@@ -1,13 +1,12 @@
-CONFIG_KERNEL_XZ=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
 CONFIG_LOG_BUF_SHIFT=15
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_BLK_DEV_INITRD=n
 # CONFIG_UID16 is not set
 # CONFIG_SYSFS_SYSCALL is not set
 # CONFIG_FHANDLE is not set
@@ -121,15 +120,14 @@ CONFIG_CVITEK_PHY=y
 # CONFIG_WLAN_VENDOR_MARVELL is not set
 # CONFIG_WLAN_VENDOR_MEDIATEK is not set
 # CONFIG_WLAN_VENDOR_RALINK is not set
-CONFIG_RTL8188FU=m
+# CONFIG_RTL8188FU is not set
 # CONFIG_WLAN_VENDOR_RSI is not set
 # CONFIG_WLAN_VENDOR_ST is not set
 # CONFIG_WLAN_VENDOR_TI is not set
 # CONFIG_WLAN_VENDOR_ZYDAS is not set
 CONFIG_INPUT=y
+CONFIG_INPUT_EVDEV=y
 # CONFIG_SERIO is not set
-# CONFIG_VT is not set
-# CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=5
@@ -340,6 +338,12 @@ CONFIG_KEYBOARD_GPIO=y
 CONFIG_INPUT_TOUCHSCREEN=y 
 CONFIG_TOUCHSCREEN_HYNITRON_TS=y
 CONFIG_USB_DWC2=y
+CONFIG_VT=y
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=m
+CONFIG_BACKLIGHT_PWM=m
+
+
 
 # these driver may broken codec driver
 # CONFIG_FUSE_FS is not set

diff --git a/build/boards/sg200x/sg2002_licheea53nano_sd/u-boot/cvi_board_init.c b/build/boards/sg200x/sg2002_licheea53nano_sd/u-boot/cvi_board_init.c
@@ -73,7 +73,7 @@ int cvi_board_init(void)
         val &= ~(1 << 26); // set level to low
         mmio_write_32(0x03020000, val);
 
-        suck_loop(200);
+        suck_loop(50);
 	user_led_toggle();
 
         val = mmio_read_32(0x03020000); // signal level
@@ -113,11 +113,12 @@ int cvi_board_init(void)
         mmio_write_32(0x030010EC, 0x3); // GPIOB 0 GPIO_MODE
 
 	// for licheervnano beta
-	mmio_write_32(0x030010ac, 0x4); // PWRGPIO 2 PWM 10
+	//mmio_write_32(0x030010ac, 0x4); // PWRGPIO 2 PWM 10
+	mmio_write_32(0x030010ac, 0x0); // PWRGPIO 2 GPIO_MODE
 
         // camera function
-        //mmio_write_32(0x0300116C, 0x5); // RX4N CAM_MCLK0 for inside preview board
-        mmio_write_32(0x0300118C, 0x5); // RX0N CAM_MCLK1
+        //mmio_write_32(0x0300116C, 0x5); // RX4N CAM_MCLK0 for alpha
+        mmio_write_32(0x0300118C, 0x5); // RX0N CAM_MCLK1 for beta
 
         // camera/tp i2c
         mmio_write_32(0x03001090, 0x5); // PWR_GPIO6 IIC4_SCL
@@ -130,7 +131,7 @@ int cvi_board_init(void)
         mmio_write_32(0x0502707c, 0x11);// Unlock PWR_GPIO[4]
 
         // wait hardware bootup
-        suck_loop(100);
+        suck_loop(50);
 	user_led_off();
         return 0;
 }
diff --git a/build/boards/sg200x/sg2002_licheea53nano_sd/u-boot/sg2002_licheea53nano_sd_defconfig b/build/boards/sg200x/sg2002_licheea53nano_sd/u-boot/sg2002_licheea53nano_sd_defconfig
@@ -9,7 +9,7 @@ CONFIG_TARGET_CVITEK_CV181X=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
-CONFIG_BOOTDELAY=1
+CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SYS_PROMPT="soph# "

diff --git a/build/boards/sg200x/sg2002_licheervnano_sd/linux/sg2002_licheervnano_sd_defconfig b/build/boards/sg200x/sg2002_licheervnano_sd/linux/sg2002_licheervnano_sd_defconfig
@@ -107,10 +107,6 @@ CONFIG_CVITEK_PHY=y
 # CONFIG_WLAN_VENDOR_TI is not set
 # CONFIG_WLAN_VENDOR_ZYDAS is not set
 CONFIG_INPUT=y
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 CONFIG_INPUT_EVDEV=y
 # CONFIG_SERIO is not set
 CONFIG_SERIAL_8250=y
@@ -448,7 +444,17 @@ CONFIG_RCU_TRACE=n
 # CONFIG_DEBUG_PREEMPT is not set
 # CONFIG_FTRACE is not set
 # CONFIG_RUNTIME_TESTING_MENU is not set
-CONFIG_USB_ROLE_SWITCH=y
+
+CONFIG_RTC_CLASS=y
+
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_USB=y
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_USB_STORAGE=y
 CONFIG_USB_LIBCOMPOSITE=y
 CONFIG_USB_F_ACM=y
 CONFIG_USB_U_SERIAL=y
@@ -461,6 +467,7 @@ CONFIG_USB_F_RNDIS=y
 CONFIG_USB_F_MASS_STORAGE=y
 CONFIG_USB_F_FS=y
 CONFIG_USB_F_UAC1=y
+CONFIG_USB_ROLE_SWITCH=y
 # buggy driver, need fix
 # CONFIG_USB_F_UVC is not set
 CONFIG_USB_CONFIGFS=y