Releases: slaclab/axi-pcie-core
Releases · slaclab/axi-pcie-core
Patch Release
Pull Requests
- #42 - v2.2.1 release candidate
Pull Request Details
v2.2.1 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Wed Oct 23 09:55:01 2019 -0700 |
Pull: | #42 (275 additions, 20 deletions, 11 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Updating the Ultrascale+ builds to use URAM for the DMA descriptors
- ip/MigClkConvt reorg.
- updating surf and ruckus submodule locks
Minor Release
Pull Requests
- #41 - v2.2.0 release candidate
Pull Request Details
v2.2.0 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Tue Sep 24 11:02:38 2019 -0700 |
Pull: | #41 (35304 additions, 320 deletions, 159 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- adding hardware/XilinxAlveoU50 support
- adding hardware/XilinxAlveoU200 support
- adding hardware/XilinxAlveoU250 support
- adding hardware/XilinxAlveoU280 support
- Updates to XilinxKcu116
- Changing KCU1500 DDR from 2400 to 2000 speed
- 90% case for making timing everytime
- Connecting DRIVER_TYPE_ID_G to AxiVersion.DEVICE_ID_G
- such that we see DRIVER_TYPE_ID_G in the proc deviceID
- Increasing 64B AXI XBAR to WRITE_ACCEPTANCE=8
- Exposing DMA_BURST_BYTES_G generic in shared/AxiPcieDma.vhd
Minor Update
Pull Requests
- #40 - v2.1.8 release candidate
Pull Request Details
v2.1.8 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Mon Aug 12 16:48:48 2019 -0700 |
Pull: | #40 (2706 additions, 766 deletions, 23 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- bug fix for SPI PROMs with more than 24-bit address space
- bug fix in the updatePcieFpga.py to stop the secondary PROM programming if primary PROM fails
- adding XilinxKcu1500MigClkConvt
- updating DDR from 2000 to 2400 speed
- updatig KCU1500 DDR constraints
Minor Update
Pull Requests
- #39 - v2.1.7 release candidate
Pull Request Details
v2.1.7 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Mon Aug 5 11:47:31 2019 -0700 |
Pull: | #39 (5 additions, 2 deletions, 4 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- bug fixes for 7-series PCIe FPGAs builds
- updating surf lock to v1.9.11
Minor Update
- #38 - v2.1.6 release candidate
- #37 - adding pip-protocol
- #35 - Sync to master branch
- #34 - Add optional org to override prom type
- #36 - Updates with respect to SURF PR#434
Pull Request Details
v2.1.6 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Tue Jul 16 08:29:57 2019 -0700 |
Pull: | #38 (4818 additions, 912 deletions, 56 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
adding pip-protocol
Author: | Larry Ruckman [email protected] |
Date: | Tue Jul 16 08:27:17 2019 -0700 |
Pull: | #37 (3470 additions, 273 deletions, 39 files changed) |
Branch: | slaclab/pip-protocol |
Notes:
Description
- Adding PCIe Intercommunication Protocol (PIP) Module
https://docs.google.com/presentation/d/1q2_Do7NnphHalV-whGrYIs9gwy7iVHokBgztF4KVqBk/edit?usp=sharingNote
This update uses the mAxiWrite[0] path for the PIP outbound path, which is no longer used by the AXI stream DMA write descriptor. The mAxiRead[0] is still available for a future AXI stream DMA descriptor that would be FW driven DMA reads (instead of CPU driven IOMEMORY reads) for better performance.
Sync to master branch
Author: | Larry Ruckman [email protected] |
Date: | Thu May 2 18:44:37 2019 -0700 |
Pull: | #35 (13 additions, 1 deletions, 1 files changed) |
Branch: | slaclab/master |
Notes:
Description
- Sync to master branch
Add optional org to override prom type
Author: | Ryan Herbst [email protected] |
Date: | Thu May 2 17:52:18 2019 -0700 |
Pull: | #34 (13 additions, 1 deletions, 1 files changed) |
Branch: | slaclab/prom_type |
Notes:
Updates with respect to SURF PR#434
Author: | Larry Ruckman [email protected] |
Date: | Wed May 29 12:36:09 2019 -0700 |
Pull: | #36 (0 additions, 8 deletions, 1 files changed) |
Branch: | slaclab/AxiStreamDmaV2-update |
Notes:
Description
- Updates with respect to SURF PR#434
Patch Release
Pull Requests
- #33 - v2.1.5 release candidate
Pull Request Details
v2.1.5 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Fri Apr 12 10:33:40 2019 -0700 |
Pull: | #33 (32 additions, 955 deletions, 14 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Depreciating 32-bit AXIS DMA support for Ultrascale hardware
- Updating DMA interface to [email protected]
- Updating submodule locks to include a AxiStreamDmaV2 DMA ordering bug fix (included in [email protected])
Patch Release
Pull Requests
- #32 - v2.1.4 release candidate
Pull Request Details
v2.1.4 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Wed Mar 27 15:05:18 2019 -0700 |
Pull: | #32 (0 additions, 0 deletions, 0 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Update ruckus.tcl submodule locks
Patch Release
Pull Requests
- #31 - v2.1.3 release candidate
Pull Request Details
v2.1.3 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Fri Mar 22 13:10:56 2019 -0700 |
Pull: | #31 (132 additions, 102 deletions, 11 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- updating the FW/SW to auto-detect the PROM type
- force AXI DMA descriptor to DESC_128_EN_C=false when address space <= 32-bits
- updating ROGUE_SIM_PORT_NUM_G range
Patch Release
Pull Requests
- #30 - v2.1.2 release candidate
Pull Request Details
v2.1.2 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Thu Mar 14 11:52:24 2019 -0700 |
Pull: | #30 (22570 additions, 2224 deletions, 130 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- adding RogueTcpStreamWrap & RogueTcpMemoryWrap support
- updating the TCP simulation bridge interfaces
- defining the AxiVersion UserValues in python
- force AXI_RESP_OK_C on PCIe M_AXI interfaces
- adding application clock frequency monitoring
- changed MODELPARAM_VALUE.C0.DDR4_tCK from 833 to 1000 for KCU1500
- updating surf to v1.9.7 submodule lock
- adding XilinxKcu116, XilinxKcu105, XilinxKc705, XilinxAc701, AlphaDataKu3 support
Patch Release
Pull Requests
- #29 - v2.1.1 release candidate
Pull Request Details
v2.1.1 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Wed Feb 6 16:12:18 2019 -0800 |
Pull: | #29 (260 additions, 74 deletions, 13 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Update LICENSE.txt
- adding release note script
- XilinxKcu1500App.xdc bug fixes
- Enabling AXI burst mode in XilinxKcu1500Mig[3:0] IP cores