Releases: slaclab/axi-pcie-core
Minor Release
Pull Requests
- #28 - v2.1.0 release candidate
Pull Request Details
v2.1.0 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Wed Jan 16 08:24:34 2019 -0800 |
Pull: | #28 (1620 additions, 7457 deletions, 36 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Xilinx has depreciated the VCU1525 platform
- migrated to Xilinx IP cores for AXI Resizing
- Updating surf submodule lock to v1.9.4 (or newer) to include DMA bug fix
Patch Release
Pull Requests
Pull Request Details
Use synchronizer for appReset to axi
Author: | Larry Ruckman [email protected] |
Date: | Mon Nov 12 08:24:33 2018 -0800 |
Pull: | #26 (8 additions, 2 deletions, 1 files changed) |
Branch: | slaclab/app-reset-sync |
Notes:
Found a path crossing clock domains without a synchronizer when appReset is not generated in axi clock domain.
v2.0.1 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Thu Nov 29 10:33:41 2018 -0800 |
Pull: | #27 (2 additions, 2 deletions, 1 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Use synchronizer for appReset to axiRst
- Updating submodule locks
Major Update
Pull Requests
- #24 - v2.0.0 release candidate
- #25 - Update prom script to use .gz
- #23 - Syncing up with master branch
Pull Request Details
v2.0.0 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Fri Nov 2 11:25:49 2018 -0700 |
Pull: | #24 (3329 additions, 22375 deletions, 160 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Depreciated Makefile steering of the axi-pcie-core's ruckus TCL files (no Makefile env. variables requirements other than defining the correct FPGA part number)
- Migrated the static image release of VCU1525 to https://github.com/slaclab/vcu1525-static-release
- Depreciated the AlphaOmega KU3 support (don't plan support this card in the future)
- Renaming core to shared
- major file structure reorganization to all hardware targets
- Deprecated PCIe GEN1 and GEN2 support for KCU1500 (PCIe bridge can autoneg down if GEN3 not supported)
- Deprecated partial reconfiguration support for KCU1500 (Ultrascale, not Ultrascale+, require a clear BIT file and configuration management would be a nightmare to manage)
- Deprecated MIG interface from the XilinxKcu1500Core.vhd
- Routing unused BAR0 address space to the application side (0x00080000 to 0x007FFFFF)
- Update all the targets to a common shared/rtl/AxiPcieCrossbar.vhd
- Updated the AxiPcieCrossbar.vhd to use the new AxiResizer.vhd in SURF (instead of Xilinx IP core)
- Adding 256-bit AXIS support (slaclab/surf#304)
- Updated all the targets' Xilinx AXI PCIe IP cores from 32-bit address to 48-bit address (except for hardware/SlacPgpCardGen3 because Xilinx 7-series IP core doesn't support > 32-bit address for AXI interface)
- For hardware/SlacPgpCardGen3 and hardware/XilinxKcu1500, add the ability to pass a custom AXI stream configuration into the DMA engine (support up to 256-bit AXIS interface)
- Updated the static VCU1500 DMA engine to use a 256-bit AXIS interface interface (default partial reconfiguration build)
- Updated all hardware target to a max. DMA lane count of 8
KCU1500 Performance Benchmarks
For a 128-bit interface (Using TxPrbs.size = 0xFFFF), here are the AXI write throughput measurements:
- Max. single DMA lane: 20Gb/s
- Max. multiple DMA lanes: 45Gb/s
For a 256-bit interface (Using TxPrbs.size = 0xFFFF), here are the AXI write throughput measurements:
- Max. single DMA lane: 40Gb/s
- Max. multiple DMA lanes: 45Gb/s
Note: "Single DMA lane" means only 1 DMA lane is active and the other lanes not generating data
Note
This pull request focuses on optimizing throughput bandwidth, not frame rate. After this pull request, we will need to merge the "SURF@128bit-desc" to meet these requirements that were provide by Matt Weaver:
The packet rate will be up to 1MHz. The packet size bounds aren't well known. I can foresee them being as large as 13kB (once in awhile) but more like 2kB on average. There may be other modes that have even larger packet sizes.
Update prom script to use .gz
Author: | Larry Ruckman [email protected] |
Date: | Fri Oct 26 16:55:53 2018 -0700 |
Pull: | #25 (28 additions, 10 deletions, 1 files changed) |
Branch: | slaclab/128bit-desc |
Notes:
Syncing up with master branch
Author: | Larry Ruckman [email protected] |
Date: | Wed Sep 26 19:17:10 2018 -0700 |
Pull: | #23 (0 additions, 6 deletions, 2 files changed) |
Branch: | slaclab/master |
Notes:
Description
Syncing up with master branch
Patch Release
Pull Requests
Pull Request Details
v1.1.5 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Fri Jun 22 13:24:42 2018 -0700 |
Pull: | #22 (50 additions, 109 deletions, 10 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- removing obsolete scripts directory
- polished the KCU1500 programming script
- Fixed some of the licensing headers
Syncing up to master
Author: | Larry Ruckman [email protected] |
Date: | Fri Jun 22 12:25:27 2018 -0700 |
Pull: | #21 (82 additions, 0 deletions, 1 files changed) |
Branch: | slaclab/master |
Notes:
Patch Release
Pull Requests
- #20 - v1.1.4 release candidate
Pull Request Details
v1.1.4 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Sun Apr 29 19:58:25 2018 -0700 |
Pull: | #20 (3 additions, 7 deletions, 1 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
work around for a 'An unexpected error has occurred (11)' Vivado bug
Patch Release
Pull Requests
- #19 - v1.1.3 release candidate
Pull Request Details
v1.1.3 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Thu Apr 26 15:52:39 2018 -0700 |
Pull: | #19 (23 additions, 10 deletions, 5 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- Updating surf lock to v1.8.1
- updating all hardware .XDCs for iprogClk
Patch Release
Pull Requests
- #18 - v1.1.2 release candidate
Pull Request Details
v1.1.2 release candidate
Author: | Larry Ruckman [email protected] |
Date: | Mon Apr 23 08:15:01 2018 -0700 |
Pull: | #18 (9 additions, 8 deletions, 1 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
AxiVersion.EN_ICAP_G = true, which gives the users the ability to reload the FPGA without power cycle
Patch Release
Pull Requests
Pull Request Details
Update to submodule locking
Author: | Larry Ruckman [email protected] |
Date: | Tue Apr 10 09:39:05 2018 -0700 |
Pull: | #17 (141 additions, 2 deletions, 2 files changed) |
Branch: | slaclab/pre-release |
Notes:
Description
- updating to ruckus v1.6.3 and surf v1.7.4
- adding releaseNotes.py
Syncing the master to pre-release
Author: | Larry Ruckman [email protected] |
Date: | Tue Apr 10 09:29:06 2018 -0700 |
Pull: | #16 (8 additions, 5 deletions, 6 files changed) |
Branch: | slaclab/master |
Notes:
Description
Syncing the master to pre-release